Real time monitoring of remote signals in an industrial environment

• US 4,996,655 A
• Filed: 02/16/1989
• Issued: 02/26/1991
• Est. Priority Date: 02/16/1989
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Johnson, Joe F., Chadwick, Gary L.
• Primary Examiner(s): Lall, Parshotam S.
• Assistant Examiner(s): Cosimano, Edward R.
• Application Number:
  US07/312,595
• Time in Patent Office: 740 Days
• Field of Search: 340/679, 340/680, 340/825.04, 340/870.28, 364/146, 364/188, 364/550, 364/551.01, 364/551.02
• US Class Current: 702/127
• CPC Class Codes: G05B 19/058 Safety, monitoring

Abstract

A signal timing analyzer monitors a programmable logic control (PLC) of an industrial machine. Signal states of the PLC are sampled and the signal information is then transferred to a receiver card which is connected to a computer data bus. This allows the computer to monitor a piece of equipment by "eavesdropping" on the industrial controller that is actually operating and monitoring the equipment. The analyzer uses an on-board clock and timing circuit, so that the computer is not limited by the computer'"'"'s clock speed in controlling sampling rates.

Claims

1. An apparatus for sampling signal timing states of equipment which has a signal output of operational states, and the signal output occurs in a substantially real time relationship to the operational states, comprising:

(a) a monitor interface for monitoring the signal output of the operational states and providing signals representative of the operational states;

(b) the monitor being electrically isolated from signals on the equipment which are being monitored and requiring no extra strobes or setup data from the equipment;

(c) a data latch for receiving the signals representative of the operational states in a parallel format and transmitting a latched output in response to a latch enable signal;

(d) a serial transmitter receiving signals from the data latch and providing corresponding signals in a serial format;

(e) timing and control circuitry for controlling a timing sequence of the latch enable signal and the receipt by the serial transmitter of the signals;

(f) a receiver circuit connected to a computer processing unit and having a data register which is addressable by the computer processing unit, wherein said receiver circuit receives the signals in the serial format and provides signals representative of said signal output of the operational states in a format which may be addressed by the computer processing unit; and

(g) means to clock the receipt by the serial transmitter of the signals and for providing signals of said signal output of the operational states in the computer addressable format, the means to clock being independent of a clock speed of the computer processing unit.

2. Apparatus for sampling signal timing states as described in claim 1, wherein:

the timing and control circuit is part of the monitor interface; and

the timing and control circuit further includes a control for selecting the sampling rate for sampling the signal timing states.

3. Apparatus for sampling signal timing states as described in claim 1, wherein:

the timing and control circuit is part of the monitor interface; and

the timing and control circuit further includes a control for selecting the sampling rate, said control including an address decoder for responding to signals from the computer processing unit.

4. Apparatus for sampling signal timing states as described in claim 1, further comprising:

a threshold voltage adjustment for controlling the sensitivity of the monitor interface to said signal output of the operational states.

5. Apparatus for sampling signal timing states as described in claim 1, wherein:

said equipment is a programmable logic controller for an industrial process machine.

6. Apparatus for sampling signal timing states as described in claim 1, wherein:

said receiver connects directly to a computer back plane bus which receives serial data from said serial transmitter; and

said receiver reconstructs the signals in the serial format in input port registers, has user selectable input port addresses, and provides transmission status information including DATA READY, TRANSMISSION ERROR, OVERFLOW, and binary count of the number of samples transmitted since a previous reading.

7. Apparatus for sampling signal timing states as described in claim 1, wherein:

the monitor interface senses optical outputs of the equipment; and

the monitor interface includes photodetector transistors and mounting hardware for use in monitoring signal indicator LED states of industrial programmable logic controllers, and for the purpose of monitoring the signal timing without direct connection to the programmable logic controller electronics, and with the advantage of allowing mounting and removal of the apparatus for sampling signal timing states without disassembly of the programmable logic controller or interruption of continuous operation of the programmable logic controller.

8. Apparatus for sampling signal timing states as described in claim 1, wherein:

said timing and control circuitry includes an interval selection circuit; and

said interval select circuit generates sampling intervals at a rate slightly above a Nyquist sampling rate of said signal outputs.

9. Apparatus for sampling signal timing states as described in claim 1, further comprising:

(h) a fiber optic transmitter receiving the serial format signals provided by the serial transmitter and transmitting an optical output modulated by the serial format signals; and

(i) said receiver including a fiber optic port capable of receiving the modulated optical output and providing the receiver circuit with said signals in the serial format.

10. Apparatus for sampling signal timing states as described in claim 9, wherein:

the means to clock includes at least one oscillator, and said means to clock provides a clocking signal to the receiver circuit and provides a clocking signal to the timing and control circuitry.

11. Apparatus for sampling signal timing states as described in claim 1, wherein:

the monitor interface senses optical outputs of the equipment.

12. Apparatus for sampling signal timing states as described in claim 11, further comprising:

a threshold voltage adjustment for controlling the sensitivity of the monitor interface to said signal output of the operational states.

13. A method of monitoring signal timing of an electrical system with a computer which is located in a remote location from the electrical system, comprising:

(a) monitoring signal output of the operational states and providing signals representative of the operational states at a monitor interface, using monitoring apparatus which is electrically isolated from said electrical system and signals which are being monitored and wherein said monitoring requires no extra strobes or setup data from said electrical system;

(b) receiving the signals representative of the operational states in a parallel format and transmitting a latched output in response to an enable signal;

(c) receiving the latched output and providing corresponding signals in a serial format;

(d) controlling a timing sequence of the enable signal and the receipt of the latched output;

(e) receiving the signals in the serial format and providing the signals in a data register which is addressable by a computer processing unit; and

(f) clocking the receipt by the serial transmitter of the signals and the providing signals of said signal output of the operational states in the computer addressable format, the clocking being independent of a clock speed of the computer processing unit.

14. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

(g) converting the signals in the serial format to an optical output modulated by the serial format signals; and

(h) receiving the modulated optical output and converting the modulated optical output to signals in the serial format.

15. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

(g) using at least one oscillator to clock the receipt; and

(h) providing a clocking signal to the receiver circuit and providing a clocking signal to the timing and control circuitry.

16. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

providing a selectable sampling rate of the signal timing of the electrical system at the monitor interface by adjusting the timing and control sequence.

17. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

using an address decoder for responding to signals from the computer processing unit in order to control to provide a selectable sampling rate of the signal timing of the electrical system at the monitor interface.

18. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

adjusting a threshold voltage for controlling the sensitivity of the monitor interface to the signal output of the operational states.

19. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

the electrical system being a programmable logic controller for an industrial process machine.

20. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

said providing the signals in a data register which is addressable by a computer processing unit being through a computer connection connected directly to a computer back plane bus.

21. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

reconstructing said signals which are provided in the serial format in input port registers, providing the reconstructed signals through input port addresses, and providing transmission status information including DATA READY, TRANSMISSION ERROR, OVERFLOW, and binary count of the number of samples transmitted since a previous reading.

22. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

(g) selecting the timing and control sequence interval; and

(h) the selected interval generating sampling intervals at a rate slightly above a Nyquist sampling rate of the signal output of the operational states.

23. Method for monitoring signal timing of an electrical system as described in claim 13, further comprising:

monitoring optical outputs at the monitor interface as said signal outputs of the electrical system.

24. Method for monitoring signal timing of an electrical system as described in claim 23, further comprising:

adjusting a threshold voltage for controlling the sensitivity of the monitor interface to the signal output of the operational states.