Apparatus having a modular decimation architecture

• US 4,999,626 A
• Filed: 10/30/1989
• Issued: 03/12/1991
• Est. Priority Date: 10/30/1989
• Status: Expired due to Term

• Current Assignee: RPX Corporation
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Bartkowiak, John G., Asghar, Safdar M.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): WILLIAMS, HOWARD L
• Application Number:
  US07/428,628
• Time in Patent Office: 498 Days
• Field of Search: 341/108, 341/110, 341/126, 341/143, 341/144, 341/155, 364/724.01
• US Class Current: 341/126
• CPC Class Codes: G06F 3/05 Digital input using the sampling of an analogue quantity at regular intervals of time , input from a/d converter or output to d/a converter
• CPC Class Codes: H03H 17/0664 where the output-delivery frequency is lower than the input sampling frequency, i.e. decimation

Abstract

An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device, the analog-digital conversion device converting incoming analog signals received from the analog device to incoming digital signals. The apparatus has a digital signal processing circuit for decimating the incoming digital signals and providing a decimated incoming digital signal to the digital device.

The digital signal processing circuit is comprised of a plurality of modules which are configured so that a specified set of the plurality of modules effects a specified number of iterations of decimation. The modules are further designed so that additional modules may be added to the specified set of modules to increase the iterations of decimation.

Claims

1. An apparatus adaptable for use with an analog-digital conversion device for effecting communications from an analog device to a digital device, said analog-digital conversion device being operatively connected to said analog device and to the apparatus and converting incoming analog signals received from said analog device into incoming digital signals representative of said incoming analog signals, the apparatus comprising:

a decimator means for decimating incoming digital signals provided by said analog-digital conversion device and providing decimated incoming digital signals representative of said incoming digital signals to said digital device;

said decimator means comprising a first decimator module, and an output means for providing digital outputs from said decimator means, said first decimator module comprising a digital input circuit, a first digital cell circuit, and a second digital cell circuit;

said digital input circuit receiving said incoming digital signal from said analog-digital conversion device and producing an incoming clocked input to said first digital cell circuit;

said first digital cell circuit producing a first iteration decimated digital signal to said second digital cell circuit in response to reception of said incoming clocked digital signal;

said second digital cell circuit producing a second iteration decimated digital signal in response to reception of said first iteration decimated digital signal;

the products of said second digital cell circuit being the outputs of said first decimator module;

said second digital cell circuit being operatively connected to provide its respective outputs to said output means;

said output means providing said decimated incoming digital signal to said digital device.

2. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 1, wherein said decimator means further comprises a second decimator module;

said second decimator module comprising a secondary digital cell circuit;

said second decimator module receiving as its input said outputs of said first decimator module and the products of said second decimator module being operatively connected to said output means.

3. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 2 wherein said digital input circuit includes a shift register and programmable logic array means for producing said incoming clocked input.

4. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 3 wherein said secondary digital cell circuit is substantially the same as said second digital cell circuit.

5. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 2 wherein said secondary digital cell circuit is substantially the same as said second digital cell circuit.

6. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 1 wherein said digital input circuit includes a shift register and programmable logic array means for producing said incoming clocked input.

7. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 1 wherein said second digital cell circuit comprises a plurality of second digital circuits;

said plurality of second digital circuits being arranged serially whereby each of said plurality of second digital circuits after a first of said plurality of second digital circuits receives as its respective input the output of the next preceding of said plurality of second digital circuits;

each succeeding of said plurality of second digital circuits producing an n+1 iteration decimated digital signal in response to reception of an nth iteration decimated digital signal;

the products of the last of said plurality of second digital circuits being the outputs of said first decimator module;

said last of said plurality of second digital circuits being operatively connected to provide its respective outputs to said output means.

8. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 7, wherein said decimator means further comprises a plurality of second decimator modules;

each of said plurality of second decimator modules comprising a secondary digital cell circuit;

said plurality of second decimator modules being arranged serially whereby a first of said plurality of second decimator modules receives as its input said outputs of said first decimator module, and each of said plurality of second decimator modules after said first of said plurality of second decimator modules receives as its respective input the output of the next preceding of said plurality of second decimator modules;

the products of the last of said plurality of second decimator modules being operatively connected to said output means.

9. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 8, wherein said secondary digital cell circuit comprises a plurality of secondary digital circuits;

said plurality of secondary digital circuits being arranged serially whereby each of said plurality of secondary digital circuits after a first of said plurality of secondary digital circuits receives as its respective input the output of the next preceding of said plurality of secondary digital circuit;

each succeeding of said plurality of secondary digital circuits producing an n+1 iteration decimated digital signal in response to reception of an nth iteration decimated digital signal.

10. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 1, wherein said decimator means further comprises a plurality of second decimator modules;

each of said plurality of second decimator modules comprising a secondary digital cell circuit;

said plurality of second decimator modules being arranged serially whereby a first of said plurality of second decimator modules receives as its input said outputs of said first decimator module, and each of said plurality of second decimator modules after said first of said plurality of second decimator modules receives as its respective input the output of the next preceding of said plurality of second decimator modules;

the products of the last of said plurality of second decimator modules being operatively connected to said output means.

11. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 10, wherein said secondary digital cell circuit comprises a plurality of secondary digital circuits;

said plurality of secondary digital circuits being arranged serially whereby each of said plurality of secondary digital circuits after a first of said plurality of secondary digital circuits receives as its respective input the output of the next preceding of said plurality of secondary digital circuit;

each succeeding of said plurality of secondary digital circuits producing an n+1 iteration decimated digital signal in response to reception of an nth iteration decimated digital signal.

13. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device as recited in claim 8 wherein the apparatus is configured to accommodate operative connection of additional modules of said plurality of modules to said specified set to selectively increase said iterations of said decimation.

12. An apparatus adaptable for use with an analog-digital conversion device for effecting communications between an analog device and a digital device, the apparatus comprising:

a digital signal processing means for decimating said incoming digital signals and providing a decimated incoming digital signal to said digital device;

said digital signal processing means comprising a plurality of modules, said plurality of modules being configured whereby a specified set of said plurality of modules effects a specified number of iterations of said decimation.