Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process

• US 5,000,113 A
• Filed: 12/19/1986
• Issued: 03/19/1991
• Est. Priority Date: 12/19/1986
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Maydan, Dan, White, John M., Umotoy, Salvador P., Collins, Kenneth S., Law, Kam S., Perlov, Ilya, Leung, Cissy, Adamik, John A., Wang, David N.
• Primary Examiner(s): BUEKER, RICHARD R
• Application Number:
  US06/944,492
• Time in Patent Office: 1,551 Days
• Field of Search: 118/715, 118/723, 118/725, 118/729, 156/345, 204/298, 204/298.01, 204/298.07, 204/298.09, 204/298.23
• US Class Current: 118/723.00E
• CPC Class Codes: C23C 16/402 Silicon dioxide
• CPC Class Codes: C23C 16/455 characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
• CPC Class Codes: C23C 16/45521 the gas, other than thermal contact gas, being introduced the rear of the substrate to flow around its periphery
• CPC Class Codes: C23C 16/45565 Shower nozzles
• CPC Class Codes: C23C 16/5096 Flat-bed apparatus
• CPC Class Codes: C23C 16/54 Apparatus specially adapted for continuous coating
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H01J 37/3244 Gas supply means
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02129 the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
• CPC Class Codes: H01L 21/02131 the material being halogen doped silicon oxides, e.g. FSG
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/31604 Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence

Abstract

A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures.

Claims

1. A semiconductor processing reactor comprising:

a housing defining a vacuum chamber for mounting a wafer horizontally and including a horizontal, inlet gas manifold over the wafer mounting position for supplying reactant gases to a wafer at the mounting position;

a gas distributor plate mounted peripherally about the wafer mounting position within the chamber, the plate including a circular array of exhaust holes therein;

a vacuum exhaust pump means; and

a circular channel beneath and communicating with the hole array and having an exhaust port connected to the vacuum exhaust pump means for flowing said gases radially across the wafer through the exhaust port, the channel volume providing high conductance relative to said exhaust holes sufficient to enable controlled radial gas flow across the wafer and through said exhaust holes into the channel.

2. A semiconductor processing reactor comprising:

a housing defining a chamber therein for mounting a wafer horizontally;

vacuum exhaust pumping means communicating with the chamber;

a horizontal inlet gas manifold oriented horizontally over the wafer mounting position for supplying reactant gases to a wafer at the mounting position;

the manifold also comprising a first central array of holes for dispensing the reactant gas downward to the wafer and a second peripheral array of holes for directing purging gas downward to the periphery of the wafer, the first and second arrays of holes each comprising a number of generally concentric rings with the first central array having random within-ring hole spacing for limiting the number of radially aligned holes and the second peripheral array having a radially staggered pattern to ensure no ring-to-ring radial alignment of holes.

3. The reactor of claim 2, the manifold further comprising an internal plate for directing internal flow radially inwardly across the first, central array of holes.

4. The reactor of claim 2, including means for circulating cooling fluid within the manifold for maintaining the internal surfaces within a selected temperature range and for maintaining the external wafer-adjacent surface above a selected temperature range.

5. A semiconductor processing reactor adapted for single step and in-situ multiple step processing sequences selected from thermal chemical vapor deposition, plasma-enhanced chemical vapor deposition, plasma-assisted etchback, plasma self-cleaning and topography modification by sputtering with uniform wafer processing over a wide range of high pressures ≦

one atmosphere, comprising;

a housing defining a chamber for mounting a wafer for processing at a selected position therein;

a first gas inlet manifold positioned above the selected position, the manifold having a center gas outlet region adapted for directing reactant gases downwardly to a wafer at the selected position and an outer peripheral region adapted for directing purging gas toward the wafer periphery;

a second gas inlet manifold located at the bottom of the chamber and adapted for directing purging gas upwardly and across the wafer;

means for circulating fluid at a controlled temperature within the first gas inlet manifold for maintaining the internal surfaces within a selected temperature range for preventing condensation, decomposition and reaction of said gases therein and for maintaining the external wafer adjacent surface above a selected temperature range for suppressing unwanted deposition thereon;

a radial gas flow pumping means comprising vacuum exhaust pump means gas;

a distributor plate mounted peripherally about the wafer mounting position within the chamber, the plate including a circular array of exhaust holes therein;

a circular channel formed in the housing communicating with the exhaust holes and having an exhaust port connected to the vacuum exhaust pump means for flowing said deposition gases radially across the wafer and through the exhaust port, said channel volume providing conductance sufficient to enable controlled radial gas flow across the wafer to the exhaust holes;

a thin high emissivity susceptor;

movable susceptor support means mounting the susceptor in a horizontal orientation and adapted for moving vertically for selectively positioning the susceptor and a wafer positioned thereon parallel to the gas manifold at selected positions closely adjacent the gas manifold;

a transparent window forming the bottom of the chamber;

radiant heating means mounted to the housing beneath the window comprising lamps and a circular reflector module mounting the lamps in a circular array for directing a collimated beam of radiant energy through the transparent window onto the susceptor with an incident power density substantially higher at the edge of the susceptor than at the center thereof; and

a gas feed-through device connected to the first gas inlet manifold, comprising tube means having inlet and outlet ends and being adapted for providing coaxial flow of deposition gas on the inside thereof and purge gas on the outside thereof into the first manifold, the tube means being adapted for connection to ground at an inlet end and to an RF power supply at the outlet or manifold end for applying RF power to the gas inlet manifold, and the tube means also having a controlled electrical impedance along its length for establishing a constant voltage gradient along said length to prevent breakdown of the gas therein.

6. A semiconductor processing reactor comprising:

a housing defining a chamber therein adapted for the gas chemistry processing of a wafer within the chamber;

a transparent window forming the bottom of the chamber; and

a thin, high emissivity susceptor positioned within the chamber for supporting a wafer;

the housing further comprising;

radiant heating means mounted to the housing beneath the window, comprising;

a circular array of lamps and a reflector module having an annular reflecting channel therein aligned with the periphery of the susceptor, the reflector module mounting the lamps in a general vertical orientation in a circular array within the channel for directing a substantially collimated beam of radiant energy from the lamps through the transparent window onto the susceptor with an incident power density substantially higher at the edge of the susceptor than at the center thereof.

7. The reactor of claim 6, the radiant energy supplied by the lamps being concentrated substantially in the wavelength range of about 0.7 to 2.5 microns.

8. The reactor of claim 7, the radiant energy supplied by the lamps being concentrated at a peak emission wavelength of approximately 0.9 to 1.5 microns.

9. The reactor of claim 9, wherein the susceptor is selected from graphite, aluminum, ceramic and composites thereof.

10. The reactor of claim 9, the reactor being adapted for operation at pressure of .sup.≦

760 torr.

13. The reactor of claim 10 or 11, the first gas inlet manifold having temperature controlled inner and outer surfaces for enhancing control of deposition within the chamber and preventing deposition within the manifold.

11. A semiconductor processing reactor comprising:

a housing defining a chamber therein adapted for the gas chemistry processing of a wafer within the chamber;

said housing further including;

a first gas inlet manifold positioned above the wafer and a second gas inlet manifold located at the bottom of the chamber, the first manifold having a center region adapted for directing deposition gas downwardly to the wafer and an outer peripheral region adapted for directing purging gas downwardly to the wafer periphery, and the second manifold being adapted for directing purging gas upwardly to the wafer periphery; and

means for exhausting undeposited gases radially away from the wafer.

12. The reactor of claim 11, adapted for operation at a pressure of 0.1 to 200 torr.

14. A chemical vapor deposition reactor, comprising:

a housing defining a chamber therein and being adapted for the chemical vapor deposition of a layer on a wafer within the chamber, and including a gas inlet manifold for supplying deposition gases to the chamber and an RF power supply and matching for forming a deposition gas plasma within the chamber to deposit the layer on the wafer; and

the housing further including a combined RF/gas feed-through device connected to the gas inlet manifold and comprising;

tube means having inlet and outlet ends and being adapted for providing co-axial flow of deposition gas on the inside thereof and purge gas on the outside thereof into the gas inlet manifold, the tube means being adapted for connection to ground at the inlet end and to an RF power supply at the outlet or manifold end, and the tube means also having a controlled electrical impedance along its length for establishing a constant voltage gradient along said length to prevent breakdown of the gas.

15. The chemical vapor deposition reactor of claim 14, the gas inlet manifold having temperature controlled inner and outer surfaces suppressing unwanted deposition on the outer surfaces and preventing condensation and deposition within the manifold.

16. The chemical vapor deposition reactor of claim 14, said gas inlet manifold having an inner region adapted for directing deposition gas downwardly to the wafer and an outer peripheral region adapted for directing purging gas downwardly to the wafer periphery;

said reactor further including;

a second gas manifold for directing purging gas upwardly to the wafer periphery; and

means for exhausting purging and undeposited deposition gases radially away from said wafer periphery.

17. The chemical vapor deposition reactor of claim 14, 15 or 16:

a transparent window forming the bottom of the chamber;

a thin, high emissivity susceptor positioned within the chamber for supporting a wafer;

radiant heating means mounted to the housing beneath the window, comprising;

a circular array of lamps and a reflector module having an annular reflecting channel therein aligned with the periphery of the susceptor, the reflector module mounting said lamps in a general vertical orientation in a circular array within the channel for directing a substantially collimated beam of radiant energy from the lamps through the transparent window onto the susceptor with an incident power density substantially higher at the edge of the susceptor than at the center thereof; and

means for internally cooling the reflector module.

18. A semiconductor processing reactor comprising a housing defining a vacuum chamber therein adapted for the chemical vapor deposition of a layer on a wafer positioned within the chamber, the housing having a closable opening therein for receiving a wafer-holder blade to insert a wafer into the chamber and remove the wafer from the chamber;

the housing further comprising;

a first, vertically movable, generally circular horizontal array of fingers adapted for holding the wafer;

a second, vertically movable, generally circular horizontal array of fingers interdigitated with the first fingers, the second fingers being adapted for holding a thin generally circular susceptor in a horizontal orientation;

a first vertically movable elevator mechanism mounting the first fingers and for moving the first fingers (a) upwardly to lift the wafer off the blade preparatory to lifting movement of the second fingers into a processing position and (b) downwardly to return the wafer to the blade; and

a second, vertically movable elevator mechanism mounting the second fingers for moving the second fingers (c) upwardly past the first fingers to lift the wafer therefrom and onto the susceptor and into the said processing position, and (d) downwardly for depositing the processed wafer onto the first fingers preparatory to return by the first fingers to the blade.

19. A chemical vapor deposition reactor system comprising:

a housing forming a vacuum chamber, said housing having a first horizontal gas manifold adapted for introducing reaction gas into the chamber;

a first, vertically movable elevator mechanism;

a first, vertically movable, generally circular horizontal array of fingers adapted for holding a wafer;

a second, vertically movable elevator mechanism;

a second, vertically movable, generally circular horizontal array of fingers interdigitated with the first fingers, the second fingers being adapted for holding a thin generally circular susceptor in a horizontal orientation;

a first, vertically movable elevator mechanism mounting the first fingers for moving the first fingers (a) upwardly to lift the wafer off the blade preparatory to lifting movement of the second fingers into a processing position and (b) downwardly to return the wafer to the blade; and

a second, vertically movable elevator mechanism mounting the second fingers for moving the second fingers (c) upwardly past the first fingers to lift the wafer therefrom and onto the susceptor and into the said processing position, and (d) downwardly for depositing the processed wafer onto the first fingers preparatory to return by the first fingers to the blade;

the bottom of said chamber comprising a quartz window;

radiant heating means mounted to the housing beneath the window and comprising a circular array of quartz-tungsten-halogen lamps and a reflector module having an annular reflecting channel therein aligned with the periphery of the horizontal susceptor, the reflector module mounting the lamps in a general vertical orientation in a circular array within the channel, for directing a substantially-collimated beam of near-IR radiant energy from the lamps through the quartz window onto the susceptor with a power density substantially higher at the edge of the susceptor than at the center thereof;

the manifold comprising a first central array of holes for dispensing deposition gas, and further comprising a second peripheral array of holes for directing purging gas downward to the periphery of the wafer;

the first and second arrays of holes each comprising a number of generally concentric rings with the first central array having random hole spacing within each ring for controlling the number of radially aligned holes; and

the second peripheral array having an approximately equal number of holes in each ring arranged in a radially staggered pattern free of ring-to-ring radial alignment of holes;

an annular second inlet manifold positioned around the bottom of the chamber adjacent the quartz window for directing purge gas into the chamber;

an annular exhaust channel defined within the housing about the periphery of the wafer deposition position;

vacuum means coupled to the annular exhaust chamber for applying a vacuum to the chamber, whereby application of the vacuum and application of purge gas to the first and second manifolds causes a first purge gas flow downwardly from the first manifold to the outer periphery of the wafer and a second purge gas flow from the second manifold sweeping across the quartz window, then upwardly past the bottom edge of the wafer, said two flows merging and flowing out of the chamber, thereby removing spent deposition gas and entrained products;

the susceptor being connected to ground; and

the reactor also comprising a deposition gas feed-through device connected to the first manifold, comprising;

tube means having inlet and outlet ends and being adapted for providing co-axial flow of deposition gas on the inside thereof and purge gas on the outside thereof into the first manifold, the tube means being adapted for connection to ground at the inlet end and to an RF power supply at the outlet or manifold end, and the tube means also having a controlled electrical impedance along its length for establishing a constant voltage gradient along said length to prevent breakdown of the gas therein.