Power factor improvement

• US 5,001,620 A
• Filed: 07/25/1989
• Issued: 03/19/1991
• Est. Priority Date: 07/25/1988
• Status: Expired due to Term

• Current Assignee: Astec International Limited Kaiser Estate
• Original Assignee: Astec International Limited (Emerson Electric Company)
• Inventors: Smith, David A.
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US07/385,662
• Time in Patent Office: 602 Days
• Field of Search: 363/89, 363/39, 363/40, 363/41, 363/49, 363/124, 363/65, 363/72, 323/222, 323/282, 323/283, 323/284, 323/285, 323/268, 323/271, 323/272, 323/901
• US Class Current: 363/89
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A boost convertor power supply comprising an electronic switch controlling current through a boost inductance, a rectifier for charging a capacitor which accumulates the resulting boost charge from the boost inductance, and circuitry for repeatedly switching the electronic switch. A pulse width modulation circuit varies the relative on/off period of each cycle of switching to cause the peck switch current to follow a variable amplitude wave of shape corresponding to the input voltage applied to the boost converter and amplitude controlled by an error amplifier and multiplier thereby regulating the output voltage. A ramp signal generator provides for pulse width stability. An error correction circuit corrects for the difference between average current in the boost inductor and peak switch current to modify the pulse width modulation circuit to reduce distortion of the line current waveform.

Claims

1. A power supply including a boost convertor comprising an electronic switch for controlling current through a boost inductance, rectifier means for charging capacitor means which accumulate the resulting boost charge from the boost inductance, means for repeatedly switching the electronic switch, means for measuring the current conducted through said electronic switch and for generating a switch current signal related to the measured current through said electronic switch, pulse width modulation means responsive to said switch current signal for varying the relative on/off period of each cycle of switching to cause the peak switch current to follow a variable amplitude waveform of shape corresponding to the input voltage applied to the boost convertor and amplitude controlled by an error amplifier and multiplier thereby regulating the output voltage, the multiplier including a comparator which switches on/off at a duty cycle determined by the error amplifier, a supplementary inductor operated within its linear region and not biased into saturation by the line current passing through it in series with the boost inductance, an output from the supplementary inductor following the slope of the ripple current caused by the switching of the boost inductance, the output of said supplementary inductor being used both to generate an error correction signal having a value proportional to the sum of the positive and negative slopes of the ripple current plus a bias for stable control at low output levels and to control a ramp signal generator for pulse width stability, means for adding the error correction signal to the variable amplitude waveform to reduce line current distortion, and means for generating a ramp signal and adding it to the switch current signal for pulse width stability.

2. A power supply as claimed in claim 1 in which negative parts of the waveform at said output of the supplementary inductor are detected by a diode and stored on a first capacitor controlling a current source comprising a transistor and a resistor for charging a second capacitor at a linear rate, said second capacitor being discharged at the end of each cycle.

3. A power supply as claimed in claim 1 in which the multiplier is a two-stage multiplier whose dynamic range is the product of the range of each stage.

4. A power supply as claimed in claim 1 wherein said boost convertor comprises a master boost converter, said power supply further comprising one or more slave boost convertors, each said slave boost convertor connected in parallel with said master boost convertor, each said slave boost convertor including a slave boost inductance, a slave electronic switch for controlling current through said slave boost inductance, slave rectifier means for directing the energy stored in said slave boost inductance towards the output of said power supply, means for measuring the current conducted through said slave electronic switch and for generating a slave switch current signal related to the measured current through said slave electronic switch, means for repeatedly switching said slave electronic switch, and slave pulse width modulation means responsive to said slave switch current signal for varying the relative on/off period of each cycle;

each said slave pulse width modulation means further responsive to the sum of said error correction signal and said variable amplitude waveform of said power supply; and

wherein said power supply further comprises a master oscillator providing clock signals to said pulse width modulation means and each said slave pulse width modulation means for synchronizing said master boost converter and said one or more slave boost convertors, said master oscillator providing equal phase angles between said clock signals.

5. An alternating-current to direct-current power convertor having an input port, an output port, and an output voltage reference, said power convertor regulating the voltage at said output port with respect to said output voltage reference, comprising:

a boost convertor including a boost inductor coupled to said input port for storing electrical energy, an electronic switch for controlling the current through said boost inductor, and a rectifier means for directing electrical energy from said boost inductor to said output port;

means for repeatedly switching said electronic switch in cycles, each cycle having an on-period when said electronic switch is conducting current and an off-period when said electronic switch is not conducting current, said means including pulse width modulating means for varying the amount of the on-period and the off-period in each said switch cycle;

monitoring means for measuring the current conducted through said electronic switch and for generating a switch current signal related to the measured current through said electronic switch;

reference comparison means for generating an error voltage signal related to the difference between the voltage at said output port and said output voltage reference;

means for generating a line voltage reference signal, said line voltage reference signal having a waveform shape related to the voltage at said input port and having an amplitude related to the value of said error voltage signal;

means for measuring the difference between the peak value of current through said electronic switch and the average value of current through said boost inductor and for generating an error-correction signal related to said difference in peak and average values; and

means for summing said error-correction signal and said line voltage reference signal to produce an error-corrected line voltage reference signal, said pulse width modulating means responsive to said error-corrected line voltage reference signal and to said switch current signal, said pulse width modulating means beginning each cycle with an on-period and switching to an off-period when said switch current signal exceeds said error-corrected line voltage reference signal, said pulse width modulating means thereby regulating the voltage at said output port to said output voltage reference and reducing the distortion of the line current waveform at said input port with respect to the line voltage waveform at said input port.

6. The power convertor of claim 5 wherein said boost inductor has a ripple-up current during said on-period where the current though said boost inductor increases and a ripple-down current during said off-period where the current through said boost inductor decreases.

7. The power convertor of claim 6 wherein said means for measuring the difference between the peak value of switch current and the average value of boost-inductor current includes means for measuring the slope of the ripple-up current and the slope of the ripple-down current in said boost inductor, said error-correction signal generating means including means for generating said error-correction signal as a function of the sum of said slope of the ripple-up current and said slope of the ripple-down current.

8. The power convertor of claim 7 wherein said error-correction signal generating means further includes means for generating said error-correction signal as a function of the sum of said slope of the ripple-up current, said slope of the ripple-down current, and a small bias value for control during low output current levels.

9. The power convertor of claim 10 wherein said means for measuring the difference between the peak value of current through said electronic switch and the average value of current through said boost inductor measures said difference during each said switching cycle.

10. The power convertor of claim 7 wherein said means for measuring the difference between the peak value of current through said electronic switch and the average value of current through said boost inductor measures said difference during each said switching cycle.

11. The power convertor of claim 6 further comprising:

stabilizing means for providing pulse-width stability in controlling said electronic switch, said stabilizing means comprising a compensation ramp generator providing a compensation ramp signal within each said switching cycle related to one half of the slope of the ripple-down current, said stabilizing means further comprising means for adding said compensation ramp signal to said switch current signal, thereby modifying the action of said pulse width modulating means.

12. The power convertor of claim 7 wherein said means for measuring the slope of the ripple-up current and the slope of the ripple-down current comprises a supplementary inductor having a first winding connected in series with said boost inductor and a second winding for providing a measure of the current through said boost inductor as a potential difference across said second winding.

13. The power convertor of claim 12 where said supplementary inductor is operated within its linear region and not biased into saturation by the current passing through its first and second windings.

14. The power convertor of claim 7 wherein said means for measuring the slope of the ripple-up current and the slope of the ripple down current comprises:

a current-sensing resistor connected in series with said boost inductor for measuring the current through said boost inductor; and

an electronic differentiating circuit coupled to said current-sensing resistor for generating a signal related to the slope of the ripple-up and ripple-down currents in said boost inductor.

15. The power convertor of claim 11 wherein said compensation ramp generator comprises:

means for receiving the value of the slope of the ripple-down current, said means for receiving including a detection diode;

a first capacitor for storing the value of the slope of the ripple-down current in the form of a voltage;

a second capacitor including a first terminal and a second terminal;

current-source means for charging said second capacitor during the on-period of each cycle such that the potential difference across said second capacitor increases at a rate proportional to the voltage on said first capacitor during the on-period of each cycle;

means for discharging said second capacitor during the off-period of each cycle such that the potential difference across said second capacitor decreases to a predetermined value;

a voltage-dividing circuit connected across said second capacitor comprising a node, a first resistor connected between said node and said first terminal of said second capacitor, and a second resistor connected between said node and said second terminal of said second capacitor, said voltage-dividing circuit providing said compensation ramp at said voltage-dividing circuit node.

16. The power convertor of claim 15 wherein said current-source means of said compensation ramp generator comprises:

a voltage supply;

a transistor including a base terminal coupled to said first capacitor, a collector terminal connected to said first terminal of said second capacitor, and an emitter terminal; and

a bias resistor connected between said transistor emitter terminal and said voltage supply.

17. The power convertor of claim 5 wherein said means for generating said line-voltage reference waveform comprises:

means for generating a rectified-line signal proportional to the absolute value of the voltage at said input port; and

multiplication means responsive to said rectified-line signal and to said output of said reference comparison means for generating said line-voltage reference waveform in proportion to the product of said rectified-line signal and said reference comparison means output.

18. The power convertor of claim 17 wherein said multiplication means comprises two stages of multiplication and wherein said line-voltage reference waveform is provided in proportion to the square of the product of said rectifier-line signal and said output-voltage error signal.

19. A power supply as claimed in claim 5 wherein said boost convertor comprises a master boost converter, said power supply further comprising one or more slave boost convertors, each said slave boost convertor connected in parallel with said master boost converter, each said slave boost convertor including a slave boost inductor coupled to said input port of said power supply for storing electrical energy, a slave electronic switch for controlling the current through said slave boost inductor, and a rectifier means for directing electrical energy from said slave boost inductor to said output port of said power supply, monitoring means for measuring the current conducted through said slave electronic switch and for generating a slave switch current signal related to the measured current through said slave electronic switch, and means for repeatedly switching said slave electronic switch in cycles, each slave switching cycle having an on-period when said slave electronic switch is conducting current and an off-period when said slave electronic switch is not conducting current, said means including slave pulse width modulating means for varying the amount of the on-period and the off-period in each said slave switching cycle;

each said slave pulse width modulating means responsive to said error-corrected line voltage reference signal of said power supply and to said slave switch current signal, said slave pulse width modulating means beginning each slave switching cycle with an on-period and switching to an off-period when said slave switch current signal exceeds said error-corrected line voltage reference signal; and

and wherein said power supply further comprises a master oscillator providing clock signals to said pulse width modulation means and each said slave pulse width modulation means for synchronizing said master boost converter and said one or more slave boost convertors, said master oscillator providing equal phase angles between said clock signals, said pulse width modulating means and said slave pulse width modulating means thereby regulating the voltage at said output port to said output voltage reference and reducing the distortion of the line current waveform at said input port with respect to the line voltage waveform at said input port.