Inverter device including parallel resonant circuit using a total equivalent capacitance

• US 5,001,621 A
• Filed: 10/06/1989
• Issued: 03/19/1991
• Est. Priority Date: 02/25/1988
• Status: Expired due to Term

• Current Assignee: Fanuc Ltd (Fanuc Corporation)
• Original Assignee: Fanuc Ltd (Fanuc Corporation)
• Inventors: Egawa, Akira
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US07/427,095
• Time in Patent Office: 529 Days
• Field of Search: 363/16, 363/17, 363/95, 363/98, 363/39, 363/40, 363/131, 363/132
• US Class Current: 363/132
• CPC Class Codes: H02M 7/4815 Resonant converters H02M7/4811 and H02M7/4826 take precedence
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

An inverter device is provided, which carries out a switching action in response to a drive signal (V_GS1 -V_GS4) having a single frequency. An inductance element (L) is connected in parallel with the output terminals of the device and capable of a parallel resonance with a total equivalent capacitance which is the sum of an equivalent electrostatic capacitance of the inverter device (Q1-Q4), as observed from the output terminals toward an input side, and an equivalent electrostatic capacitance of a load (LO). With this arrangement, the charge and discharge loss due to the source-drain capacitance (C_OSS1 -C_OSS4) is reduced, and the efficiency is improved.

Claims

1. An inverter device having an equivalent electrostatic output capacitance and including:

input terminal means for receiving a d.c. voltage input;

output terminals connectable to a load having an equivalent electrostatic capacitance;

an inductance element (RFC) having one end operatively connected to said input terminal means and another end connectable to receive the d.c. input voltage;

at least one MIS transistor operatively connected in series between said input terminal means and said output terminals and connectable to receive a drive signal having a single frequency; and

another inductance element operatively connected in parallel with said output terminals and having an inductance selected to achieve parallel resonance with a total equivalent capacitance which is sum of the equivalent electrostatic output capacitance and the equivalent electrostatic capacitance of the load.

2. The inverter device according to claim 1, further comprising:

a capacitance element operatively connected in parallel with said output terminals, and wherein the inductance of said another inductance element is selected to achieve parallel resonance with a total equivalent capacitance at said output terminals including a capacitance of said capacitance element.

3. The inverter device according to claim 2, further comprising:

an additional capacitance element operatively connected in parallel with said MIS transistor, and wherein the inductance of said inductance element is selected to achieve parallel resonance with an equivalent output capacitance at said output terminals including a capacitance of said capacitance element.

4. The inverter device according to claim 3, having elements satisfying ##EQU9## stand, where R is a net parallel resistance value at said output terminals including a resistance of the load, C is the total equivalent capacitance, L is the inductance at said output terminals, and fn is an operating frequency of said inverter device.

5. The inverter device according to claim 1, further comprising:

a capacitance element operatively connected in parallel with said MIS transistor, and wherein the inductance of said another inductance element is selected to achieve parallel resonance with an equivalent output capacitance at said output terminals including a capacitance of said capacitance element.

6. The inverter device according to claim 2, having elements satisfying ##EQU10## stand, where R is a net parallel resistance value at said output terminals including a resistance of the load, C is the total equivalent capacitance at said output terminals, L is the inductance at said output terminals, and f is an operating frequency of said inverter device.

7. The inverter device according to claim 1, further comprising:

additional MIS transistors connected in parallel, each of said MIS transistors having a capacitance C_OSS, and a number of said MIS transistors satisfying

space="preserve" listing-type="equation">N=C/2C.sub.OSS

stands, where C is the equivalent electrostatic output capacitance.

8. The inverter device according to claim 1, having elements satisfying ##EQU11## stand, where R is a net parallel resistance value at said output terminals including a resistance of the load, C is the total equivalent capacitance, L is the inductance at said output terminals, and fn is an operating frequency of said inverter device.