Circuitry and method for controlling the firing of a thyristor
First Claim
1. A thyristor control circuit for providing AC line synchronization of the firing pulses to thyristors arranged in a multi-thyristor bridge configuration across voltage lines, said control circuit comprising:
- means for monitoring the coincidence of a line voltage on said voltage lines with an average load terminal voltage;
means controlled by said monitoring means for generating a timing signal; and
means responsive to said generating means and to a phase command signal for transmitting firing pulses to said thyristors.
1 Assignment
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Accused Products
Abstract
Circuitry and methods are provided for AC line synchronization of the firing means for phase-controlled thyristors in a DC motor speed control system. A line synchronization method and system is disclosed which eliminates zero offset in the phase command input function. This zero offset, which is cuased by motor counter EMF, occurs in prior art controllers which use zero crossings of the AC line voltages for line synchronization of thyristor firing. This invention provides line synchronization timing intervals of constant duration that terminate at the coincidence of AC line voltage and motor counter EMF with the coincidence being the latest time at which the particular thyristor being controlled is forward biased in the absence of current flow. Application to N-phase AC to DC converters for DC motor speed control is disclosed. Application to N-phase AC to DC converters for control of the DC bus voltage of variable frequency voltage-source inverters controlling the speed of an AC motor or a brushless DC motor is also disclosed.
32 Citations
40 Claims
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1. A thyristor control circuit for providing AC line synchronization of the firing pulses to thyristors arranged in a multi-thyristor bridge configuration across voltage lines, said control circuit comprising:
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means for monitoring the coincidence of a line voltage on said voltage lines with an average load terminal voltage; means controlled by said monitoring means for generating a timing signal; and means responsive to said generating means and to a phase command signal for transmitting firing pulses to said thyristors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A single phase half-wave bi-directional converter system to control current to a load, comprising:
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a first firing pulse generator responsive to phase-command and enable inputs and operable to generate a first firing signal; a first thyristor coupled to a terminal of said load, said first thyristor responsive to said first firing signal;
a second firing pulse generator responsive to phase-command and enable inputs and operable to generate a second firing signal;a second thyristor coupled to the same said terminal of the load, said second thyristor responsive to said second firing signal; a timing interval generator operable to generate a first variable timing signal and a second variable timing signal responsive to the coincidence of a line voltage and a load terminal voltage, said first timing signal operable to enable said first pulse generator and said second timing signal operable to enable said second pulse generator, thereby synchronizing operation of said pulse generators to the line frequency. - View Dependent Claims (15)
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16. A method for providing AC line synchronization of the firing pulses to thyristors arranged in a multi-thyristor bridge configuration across voltage lines, said method comprising the steps of:
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monitoring the coincidence of a line voltage on the voltage lines and a load terminal voltage; generating timing signals controlled by said monitoring step; and transmitting firing pulses to said thyristors responsive to said generating step and to an external command signal. - View Dependent Claims (17, 18)
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19. A method for controlling the DC load current , supplied by a full-wave bipolar thyristor AC to DC converter comprising the steps of:
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generating first, second, third and fourth variable timing signals responsive to the coincidence of a line voltage of a certain slope and an average load terminal voltage, said first, second, third and fourth variable timing signals being operable to enable first, second, third and fourth firing pulse generators; and producing first, second, third and fourth firing signals responsive to said first, second, third and fourth variable timing signals and to an external signal; thereby controlling a conversion element within said AC to DC converter; and wherein a plurality of conversion elements comprise said AC to DC converter. - View Dependent Claims (20, 21)
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22. Circuitry for controlling the DC current to a load in a single-phase full-wave converter system comprising:
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first, second, third and fourth thyristor pairs, each having a first thyristor and a second thyristor in a back-to-back configuration, said thyristor pairs operable for converting alternating current into direct current; a timing interval generator for generating first, second, third and fourth variable timing signals responsive to the difference between a line voltage and a load terminal voltage; a first firing pulse generator having a first input to receive a phase command, a second input to receive said first variable timing signal, and an output to transmit a firing pulse to the gate of said first thyristor of said first thyristor pair and to the gate of said first thyristor of said fourth thyristor pair; a second firing pulse generator having a first input to receive a phase command, a second input to receive said second variable timing signal, and an output to transmit a firing pulse to the gate of said first thyristor of said second thyristor pair and to the gate of said first thyristor of said third thyristor pair; a third firing pulse generator having a first input to receive a phase command, a second input to receive said third variable timing signal, and an output to transmit a firing pulse to the gate of said second thyristor of said first thyristor pair and to the gate of said second thyristor of said fourth thyristor pair; a fourth firing pulse generator having a first input to receive a phase command, a second input to receive said fourth variable timing signal, and an output to transmit a firing pulse to the gate of said second thyristor of said second thyristor pair and to the gate of said second thyristor of said third thyristor pair; and means controlled by said timing interval generator for enabling said firing pulse generators. - View Dependent Claims (23)
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24. A thyristor control circuit for use in controlling the firing of thyristors arranged in a back-to-back relationship, said thyristors connected in a multithyristor bridge configuration across AC voltage lines, said control circuit comprising:
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means for monitoring the coincidence of the line voltage on each phase of said voltage lines and a load terminal voltage; means controlled by said monitoring means for generating a plurality of variable timing signals; and means responsive to said generating means and an external signal for generating and transmitting firing pulses to said thyristors. - View Dependent Claims (25, 26)
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27. Circuitry for controlling the DC current to a load in a three-phase full-wave AC to DC converter system, comprising:
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first, second, third, fourth, fifth and sixth thyristor pairs, each having a first thyristor and a second thyristor in a back-to-back configuration, said thyristor pairs for converting alternating current into direct current; and a first firing module responsive to the difference between a first line voltage and an average load terminal voltage, said first firing module having a first output for transmitting a first firing pulse to the gate of said first thyristor of said first thyristor pair, a second output for transmitting a second firing pulse to the gate of said second thyristor of said first thyristor pair, a third output for transmitting a third firing pulse to the gate of said first thyristor of said fourth thyristor pair, and a fourth output for transmitting a fourth firing pulse to the gate of said second thyristor of said fourth thyristor pair; a second firing module responsive to the difference between a second line voltage and said load terminal voltage, said second firing module having a first output for transmitting a fifth firing pulse to the gate of said first thyristor of said second thyristor pair, a second output for transmitting a sixth firing pulse to the gate of said second thyristor of said second thyristor pair, a third output for transmitting a seventh firing pulse to the gate of said first thyristor of said fifth thyristor pair, and a fourth output for transmitting an eighth firing pulse to the gate of said second thyristor of said fifth thyristor pair; a third firing module responsive to the difference between a third line voltage and said load terminal voltage, said third firing module having a first output for transmitting a ninth firing pulse to the gate of said first thyristor of said third thyristor pair, a second output for transmitting a tenth firing pulse to the gate of said second thyristor of said third thyristor pair, a third output for transmitting an eleventh firing pulse to the gate of said first thyristor of said sixth thyristor pair, and a fourth output for transmitting a twelfth firing pulse to the gate of said second thyristor of said sixth thyristor pair. - View Dependent Claims (28, 29)
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30. Circuitry for controlling the firing of thyristors in an AC to DC converter to control the DC bus voltage, said DC bus voltage being the input to an inverter, comprising:
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a plurality of timing interval generators for generating a plurality of variable timing signals responsive to the difference between a line voltage and an average load terminal voltage; a plurality of firing pulse generators coupled between said timing interval generators and said thyristors for controlling the firing of said thyristors; and means controlled by said timing interval generator and an external signal for enabling said firing pulse generators. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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Specification