Cascaded buck converter circuit with reduced power loss
First Claim
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1. A cascaded buck converter circuit comprising, in combination:
- a pair of input terminals for connection to a source of input voltage;
a first and a second switching transistor;
a first and a second diode, a first and a second inductor and a first and a second capacitor;
said pair of input terminals, said first switching transistor, said first inductor and said first capacitor connected in series circuit relation;
said first diode connected in parallel with the series connection of said first inductor and said first capacitor thereby to define a first buck converter stage;
said first capacitor, said second switching transistor, said second inductor and said second capacitor connected in series circuit relation;
said second diode connected in parallel with the series connection of said second inductor and said second capacitor;
the terminals of said second capacitor defining a pair of output terminals for connection to one of an output circuit or to a further buck converter stage;
said first and second switching transistor being comprised respectively of a first and second power MOSFET each with a respective silicon area, the first and second MOSFET transistors being so selected that the total silicon area of said first and second power MOSFETs is substantially less than a silicon area associated with a single buck converter circuit having the same input and output voltages and the same output current as those of said cascaded buck converter circuit.
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Abstract
Two or more buck converter circuits are cascaded in such a manner that the output of one serves as the input to the next, with the input voltage to each succeeding buck converter stage being reduced in magnitude. The total circuit losses are substantially reduced as compared to the losses generated in a single buck converter having the same input voltage range and the same output voltage and output current. Both positive and negative output terminals may be provided for an output stage.
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Citations
17 Claims
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1. A cascaded buck converter circuit comprising, in combination:
a pair of input terminals for connection to a source of input voltage;
a first and a second switching transistor;
a first and a second diode, a first and a second inductor and a first and a second capacitor;
said pair of input terminals, said first switching transistor, said first inductor and said first capacitor connected in series circuit relation;
said first diode connected in parallel with the series connection of said first inductor and said first capacitor thereby to define a first buck converter stage;
said first capacitor, said second switching transistor, said second inductor and said second capacitor connected in series circuit relation;
said second diode connected in parallel with the series connection of said second inductor and said second capacitor;
the terminals of said second capacitor defining a pair of output terminals for connection to one of an output circuit or to a further buck converter stage;
said first and second switching transistor being comprised respectively of a first and second power MOSFET each with a respective silicon area, the first and second MOSFET transistors being so selected that the total silicon area of said first and second power MOSFETs is substantially less than a silicon area associated with a single buck converter circuit having the same input and output voltages and the same output current as those of said cascaded buck converter circuit.- View Dependent Claims (2, 3, 4, 5, 6, 9, 10, 11, 12, 13, 14)
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7. A cascaded buck converter circuit comprising, in combination:
- a first buck converter stage including a first switching transistor means, a first output capacitor and first input terminal means;
a second buck converter stage including a second switching transistor means, a second output capacitor and second input terminal means;
a variable input voltage connected to said first input terminal means, and control means for modifying the duty cycle of said first switching transistor means to maintain a constant voltage across said first output capacitor;
said first output capacitor connected to said second input terminal means;
said second switching transistor means having a duty cycle which maintains a given output voltage across said second capacitor;
said first and second switching transistor means being comprised respectively of a first and second power MOSFET each with a respective silicon area, the first and second MOSFET transistors being so selected that the total silicon area of said first and second power MOSFETs is substantially less than a silicon area associated with a single buck converter circuit having the same input and output voltages and the same output current as those of said cascaded buck converter circuit. - View Dependent Claims (8)
- a first buck converter stage including a first switching transistor means, a first output capacitor and first input terminal means;
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15. A cascaded buck converter circuit, comprising:
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positive, negative and ground output terminals; a pair of input terminals for connection to a source of input voltage; a first buck converter stage including a first switching transistor means, a first output capacitor and first input terminal means; a second buck converter stage coupled between said first stage and said output terminals and including a second switching transistor means;
inductor means coupled between said positive output terminal and said second switching transistor; and
first and second output capacitors;
one side of each of said first and second output capacitors connected to said ground terminal;
the other side of said first output capacitor connected to said positive output terminal;
the other side of said second output capacitor connected to said negative output terminal; and
diode means coupled between said inductor means and said first and second capacitor means to permit charging in series with said inductor means of said first output capacitor from said pair of input terminals when said second switching transistor means is on during its duty cycle and to permit current flow to continue through said inductor means and said first and second capacitors when said second switching transistor means is off during its duty cycle;
said first and second switching transistor means being comprised respectively of a first and second power MOSFET each with a respective silicon area, the first and second MOSFET transistors being so selected that the total silicon area of said first and second power MOSFETs is substantially less than a silicon area associated with a single buck converter circuit having the same input and output voltages and the same output current as those of said cascaded buck converter circuit. - View Dependent Claims (16, 17)
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Specification