Computer system having efficient data transfer operations
First Claim
1. A computer system having efficient data transfer operations, comprising:
- a system memory having system addresses;
a central processing unit connected to said system memory;
means for receiving a plurality of indirect data address word commands from said central processing unit;
means for combining said plurality of indirect data address word commands to form a lesser number of combined indirect data address word commands if the system addresses specified in said indirect data address word commands are contiguous; and
means for transmitting data between said system memory specified by said combined indirect address word commands and another component of said computer system.
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Abstract
A computer system has a system memory, a central processing unit, an input/output controller, and at least one device. When the central processing unit wants data transferred to/from system memory from/to the device, it sends Indirect DAta Address Word (IDAW) commands to the I/O controller. Instead of performing a direct memory access (DMA) operation for each IDAW command, the I/O controller starts an IDAW look ahead procedure. In this procedure, the I/O controller checks to see if the system addresses of the system memory specified in the IDAW commands are contiguous. If so, the procedure combines IDAWs that specify contiguous system addresses up to the maximum DMA transfer length. Using this procedure, the number of DMA operations sent to the system memory is minimized, and the computer system has more efficient data transfer operations.
116 Citations
10 Claims
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1. A computer system having efficient data transfer operations, comprising:
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a system memory having system addresses; a central processing unit connected to said system memory; means for receiving a plurality of indirect data address word commands from said central processing unit; means for combining said plurality of indirect data address word commands to form a lesser number of combined indirect data address word commands if the system addresses specified in said indirect data address word commands are contiguous; and means for transmitting data between said system memory specified by said combined indirect address word commands and another component of said computer system. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An input/output controller, for connecting to a system memory having system addresses and to a central processing unit, said input/output controller comprising:
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means for receiving a plurality of indirect data address word commands from said central processing unit; means for combining said plurality of indirect data address word commands to form a lesser number of combined indirect data address word commands if the system addresses specified in said indirect data address word commands are contiguous; and means for transmitting data between said input/output controller and said system memory specified by said combined indirect address word commands.
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8. A method of data transfer in a computer system having a system memory, a central processing unit connected to said system memory, an input/output controller connected to said system memory, said system memory having system addresses, said method comprising the steps of:
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said input/output controller receiving a plurality of indirect data address word commands from said central processing unit; said input/output controller combining said plurality of indirect data address word commands to form a lesser number of combined indirect data address word commands if the system addresses specified in said indirect data address word commands are contiguous; and said input/output controller transmitting data between said input/output controller and said system memory specified by said combined indirect address word commands. - View Dependent Claims (9, 10)
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Specification