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Sample-and-hold unit with high sampling frequency

  • US 5,017,924 A
  • Filed: 04/26/1990
  • Issued: 05/21/1991
  • Est. Priority Date: 05/03/1989
  • Status: Expired due to Fees
First Claim
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1. A sample and hold unit comprising:

  • an input for receiving an input signal;

    at least two parallel circuits, each receiving said input signal and each parallel circuit comprising;

    a first follower switch to load a sample of said input signal into a capacitor when said first switch is closed;

    a second holder switch to transfer the loaded sample to an output when said second switch is closed;

    a sampling clock signal for controlling said first and second switches of a first parallel circuit; and

    at least one phase-shifted sampling clock signal for controlling said first and second switches of a respective at least one second parallel circuit;

    wherein each of said parallel circuits sequentially transmits to said output the sample loaded in the capacitor of said respective parallel channel when said second switch of said respective parallel channel is closed.

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