AC to DC power conversion circuit with low harmonic distortion

• US 5,019,952 A
• Filed: 11/20/1989
• Issued: 05/28/1991
• Est. Priority Date: 11/20/1989
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Wright, John C., Christopher, Gerard W., Relation, Alfred E., Smolenski, Joseph L.
• Primary Examiner(s): Skudy, Robert
• Assistant Examiner(s): VOELTZ, EMANUEL T
• Application Number:
  US07/439,319
• Time in Patent Office: 554 Days
• Field of Search: 363/16, 363/74, 363/78, 363/79, 363/80, 363/89, 363/95, 363/97, 363/98, 363/124, 363/131, 323/222, 323/223, 323/259, 323/265, 323/273, 323/275, 323/282, 323/284, 323/299, 323/349, 323/351, 323/285
• US Class Current: 363/16
• CPC Class Codes: H02M 1/4208 Arrangements for improving power factor of AC input
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

In an AC to DC power conversion circuit including a boost inductor connected in series between a full-wave rectifier and a DC load, a switch is connected to selectively shunt boost inductor current from the load. Switch conduction is controlled by a pulse width modulator generating switching pulses at a high fixed frequency. The pulse widths are automatically varied as a function of boost inductor current, load voltage, and an ideal sinusoidal waveform derived from the AC input voltage to force the boost inductor current to closely conform to the ideal sinusoidal waveform and thus minimize harmonic distortion, while achieving load voltage regulation and near unity power factor.

Claims

1. A power conversion circuit for converting AC input power to DC output power for application to a DC load connected across a pair of load terminals, said circuit comprising:

a rectifier including an input for receiving AC input power and an output for developing a full-wave rectified AC voltage;

a boost inductor and a diode connected in series between said rectifier output and one of said load terminals;

a capacitor connected across said load terminals;

switching means connected in series with said inductor across said rectifier output;

current sensing means for generating a first signal representative of the circuit current flowing through said boost inductor;

voltage sensing means for generating a second signal representative of a DC voltage appearing across said load terminals;

first means connected to said rectifier input for generating a harmonic distortion-free waveform reference signal representative of an AC input voltage sinusoidal waveform;

a multiplier for generating a third signal equal to the product of said second signal and said waveform reference signal;

second means for generating a fourth signal representative of the relative magnitudes of said first and third signals;

third means for generating a series of timing pulses at a fixed frequency; and

a pulse width modulator responsive to said fourth signal and said timing pulses for closing said switching means with the occurrence of each said timing pulse and opening said switching means during each interval between consecutive timing pulses when said first signal rises to the magnitude of said third signal, whereby to force the circuit current flowing through said boost inductor into close amplitude conformity with the AC input voltage waveform.

2. The power conversion circuit in accordance with claim 1 wherein said fixed frequency of said timing pulses is in excess of the frequency of the AC input power.

3. The power conversion circuit in accordance with claim 2 wherein said second means is a summing circuit for subtractively combining said first and third signals to generate said fourth signal, said pulse width modulator opening said switching means in response to a change in polarity of said fourth signal.

4. The power conversion circuit in accordance with claim 1, which further includes current fed inverter having an input connected across said capacitor and an output, an isolation transformer having a primary winding connected to said inverter output and a secondary winding, and a full-wave bridge rectifier connecting said secondary winding to said load terminals.

5. The power conversion circuit defined in claim 4, which further includes an output inductor connected in circuit between said secondary winding and said load terminals, and an output capacitor connected across said load terminals.

6. The power conversion circuit in accordance with claim 3, wherein a DC offset signal is additively combined with said first and third signals in said summing circuit.

7. The power conversion circuit in accordance with claim 3, which includes current limiting switching means and a free-wheeling diode connected across said rectifier output, said current limiting switching means operating to automatically remove said full-wave rectified AC voltage from said boost inductor in response to excessive magnitudes of boost inductor current.

8. The power conversion circuit in accordance with claim 3, which further includes startup switching means connected between said capacitor and one of said load terminals, said startup switching means being held open until said capacitor is charged to a voltage level sufficient for steady-state circuit operating.

9. The power conversion circuit in accordance with claim 8, wherein a DC offset signal is additively combined with said first and third signals in said summing circuit.

10. The power conversion circuit in accordance with claim 9, which includes current limiting switching means and a free-wheeling diode connected across said rectifier output, said current limiting switching means operating to automatically remove said full-wave rectified AC voltage from said boost inductor in response to excessive magnitudes of boost inductor current.

11. A polyphase power conversion circuit for converting AC input power from a polyphase source to DC output power for application to a DC load, said circuit comprising:

A. a plurality of separate conversion circuits having respective pairs of output terminals connected with the DC load, each including;

a rectifier having an input connected with a different phase of the polyphase source and an output for developing a full-wave rectified AC voltage,

a boost inductor and a diode connected in series between said rectifier output and one of said output terminals,

a capacitor connected across said output terminals,

switching means connected in series with said inductor across said rectifier output,

current sensing means for generating a first signal representative of the circuit current flowing through said boost inductor,

first means connected to said rectifier input for generating a harmonic distortion-free waveform reference signal representative of an AC input voltage sinusoidal waveform,

a multiplier for generating a second signal equal to the product of said waveform reference signal and a third signal,

second means for generating a fourth signal representative of the relative magnitudes of said first and second signals,

third means for generating a series of timing pulses at a fixed frequency, and

a pulse width modulator responsive to said fourth signal and said timing pulses for closing said switching means with the occurrence of each said timing pulse and opening said switching means during each interval between consecutive timing pulses when said first signal rises to the magnitude of said second signal, whereby to force the circuit current flowing through said boost inductor into close amplitude conformity with the AC input voltage waveform; and

B. a polyphase voltage sense circuit connected with said output terminals of each said conversion circuit for deriving separate said third signals for respective application to said multipliers of said conversion circuits.