Integrated circuit power device with automatic removal of defective devices and method of fabricating same

• US 5,021,861 A
• Filed: 05/23/1990
• Issued: 06/04/1991
• Est. Priority Date: 05/23/1990
• Status: Expired due to Term

• Current Assignee: Intellectual Property Ventures LLC
• Original Assignee: North Carolina State University (University of North Carolina System)
• Inventors: Baliga, Bantval J.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US07/527,747
• Time in Patent Office: 377 Days
• Field of Search: 357/51, 357/41, 357/23.1, 307/465
• US Class Current: 257/529
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

An integrated circuit power device is disclosed having a large number of individual devices formed in an integrated circuit. Disabling devices are provided in the integrated circuit, a respective one of which is electrically connected to an associated one or more of the individual devices. Each of the disabling devices is responsive to a defect in the associated one or more individual devices, such as a short circuit, for automatically disabling the associated one or more individual devices. An operable integrated circuit power device is obtained, notwithstanding a defective one or more of the individual devices. Testing of individual devices, or customized mask generation is not necessary. In a preferred embodiment, the disabling device is a fusible link formed of a low melting point conductor. In response to the initial powering up of the device or in response to a gate pulse, all fusible links associated with short circuited individual devices will melt, thereby insulating the remainder of the devices from the short circuit.

Claims

1. A power device comprising:

an integrated circuit;

a plurality of individual devices formed in said integrated circuit, electrically connected in parallel, the individual devices each handling a relatively small current so that said plurality of individual devices electrically connected in parallel handle a relatively large current, to thereby provide an integrated circuit power device; and

,

a plurality of defect responsive automatic disabling means formed in said integrated circuit, a respective one of which is electrically connected to an associated at least one of said individual devices, each of said defect responsive automatic disabling means being responsive to a defect in the associated individual devices for automatically disabling the associated individual devices;

whereby an operable integrated circuit power device is obtained notwithstanding a defect in the individual power devices thereof.

2. The power device of claim 1 further comprising a common electrode in said integrated circuit;

said plurality of defect responsive automatic disabling means being electrically connected between the associated individual devices and said common electrode, for electrically disconnecting the associated individual devices from said common electrode in response to a defect in the associated individual devices.

3. The power device of claim 1 wherein said defect responsive automatic disabling means comprises a fusible link.

4. The power device of claim 2 wherein said defect responsive automatic disabling means comprises a fusible link.

5. The power device of claim 4 wherein said fusible link is configured to melt in response to a short circuit current in the associated individual devices, to thereby electrically disconnect the associated individual devices from said common electrode.

6. The power device of claim 4 wherein said plurality of individual devices comprise a plurality of MOS-gated cells, each having a source, a drain and a gate, the sources of said plurality of individual cells being connected together and the drains of said plurality of individual cells being connected together;

wherein said common electrode comprises a common gate electrode; and

wherein said plurality of fusible links are connected between said common gate electrode and an associated at least one of said gates of said individual devices, each of said fusible links being configured for melting in response to a short circuit between the associated gate and source or drain.

7. The power device of claim 1 wherein the at least one of said associated individual devices comprises a cell block of individual devices electrically connected in parallel.

8. The power device of claim 1 wherein said individual devices are selected from the group consisting of MOSFETS, IGBTs and MCTs.

9. The power device of claim 1 wherein said defect responsive automatic disabling means comprises an electronic logic circuit.

10. A power device comprising:

an integrated circuit;

a plurality of cell blocks, each containing an array of individual cells electrically connected in parallel, each array of individual cells comprising at least one individual device for passing a relatively small current so that said plurality of cell blocks, electrically connected in parallel, pass a relatively large current, to thereby provide an integrated circuit power device;

a fusible link electrically connected to each cell block each of said fusible links being configured for melting in response to a defect in the connected cell; and

a common control electrode adjacent to each cell block and electrically connected to each fusible link;

whereby cell blocks containing defective individual cells are automatically disabled.

11. The power device of claim 10 wherein said individual cells are selected from the group consisting of MOSFETs, IGBTs and MCTs.

12. The power device of claim 10 wherein each of said cell blocks comprises a plurality of MOS cells, each having a source, a drain, and a gate, the sources of said plurality of cells being connected together, the drains of said plurality of cells being connected together, and the gates of said plurality of cells being connected together;

wherein said common control electrode comprises a power device gate electrode; and

wherein a fusible link is connected between said power device gate electrode and the gates of each cell block each of said fusible links being configured for melting in response to a short circuit between the gate and the source or drain in the associated cell block.