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Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing

  • US 5,021,947 A
  • Filed: 01/30/1990
  • Issued: 06/04/1991
  • Est. Priority Date: 03/31/1986
  • Status: Expired due to Fees
First Claim
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1. A method of data-flow multiprocessing for highly efficient data and signal processing, including the steps of:

  • writing a program of instructions in a high-level language onto a storage medium;

    reading said program of instructions from said storage medium into a compiler;

    compiling by said compiler said instructions by translating said instructions into a plurality of machine instructions;

    inputting a file describing a data-flow processor having multiple processing elements, with an identification scheme for said processing elements being formed in accordance with a three-dimensional array of processing elements, into a global allocator program;

    running said global allocator program in order to process said plurality of machine instructions in order to assign said machine instructions to a plurality of said processing elements in said data-flow processor for execution of said machine instructions;

    inputting a plurality of data into said data-flow processor in order to execute said program in said data-flow processor; and

    executing said machine instructions in said data-flow processor; and

    wherein said executing step includes a step of employing a template memory in each of said processing elements for identifying data elements from a plurality of said processing elements for arithmetic operations.

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