Electronic flash charging circuit

• US 5,023,470 A
• Filed: 04/18/1989
• Issued: 06/11/1991
• Est. Priority Date: 04/18/1988
• Status: Expired due to Term

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Umezu, Takao, Onozuka, Haruo, Takada, Seiji, Sato, Muneyoshi
• Primary Examiner(s): NOT, DEFINED
• Application Number:
  US07/339,987
• Time in Patent Office: 784 Days
• Field of Search: 307/66, 307/108, 320/2, 320/21, 320/50, 354/412, 354/418, 354/127.1, 315/209 R, 315/232, 315/241 R, 315/241 P, 315/241 S
• US Class Current: 307/108
• CPC Class Codes: H05B 41/32 for single flash operation

Abstract

An electronic flash charging circuit for use with a camera having a power source common to a microcomputer that controls a plurality of camera functions and to an electronic flash. The charging circuit has a booster circuit for boosting a charging voltage with which a main capacitor of the electronic flash is charged and a controller that causes the booster circuit to operate intermittently, thereby intermittently charging the main capacitor.

Claims

1. An electronic flash charging circuit for a camera having a power source common to a microcomputer that controls a plurality of camera functions and to an electronic flash, the charging circuit comprising:

booster circuit means for boosting a voltage applied to the charging circuit and charging a main capacitor of the electronic flash, said booster circuit means comprising a blocking oscillator; and

control means for causing said booster circuit means to operate intermittently, thereby intermittently charging the main capacitor;

wherein said control means includes a transistor of which the emitter is connected to an input terminal of said blocking oscillator and the base is fed with a signal changing alternately between a high level and a low level.

2. A charging circuit as defined in claim 1, wherein the collector of said transistor is fed with a signal for disabling said transistor for a predetermined period of time after a discharge of said main capacitor.

3. A charging circuit as defined in claim 1, further comprising a back-up capacitor connected to said common power source parallel to said microcomputer for backing up said microcomputer.

4. An electronic flash charging circuit for a camera having a power source common to a microcomputer that controls a plurality of camera functions and to an electronic flash, the charging circuit comprising:

booster circuit means for boosting a voltage applied to the charging circuit and charging a main capacitor of the electronic flash from an initial voltage subsisting in the main capacitor after operation of the electronic flash, to a minimum operating voltage for the electronic flash; and

control means for causing said booster circuit means to operate intermittently during charging of said main capacitor from the initial voltage to the minimum operating voltage, thereby intermittently recharging the main capacitor after actuation of said electronic flash.

5. A charging circuit as defined in claim 4, wherein said control means operates responsive to signals supplied from the microcomputer.

6. A charging circuit as defined in claim 4, wherein said booster circuit means comprises a blocking oscillator.

7. A charging circuit as defined in claim 6, wherein said control means includes a transistor of which the emitter is connected to an input terminal of said blocking oscillator and the base is fed with a signal changing alternately between a high level and a low level.

8. A charging circuit as defined in claim 7, wherein said signal changing alternately between a high level and a low level is generated by said microcomputer.

9. A charging circuit as defined in claim 7, wherein the collector of said transistor is fed with a signal for disabling said transistor for a predetermined period of time after a discharge of said main capacitor.

10. A charging circuit as defined in claim 4, further comprising a back-up capacitor connected to said common power source parallel to said microcomputer, for backing up said microcomputer.

11. A charging circuit as defined in claim 10, wherein said back-up capacitor has a capacity which is so defined as to supply the microcomputer with a minimum operating voltage therefor, when the voltage of the power source falls below said minimum operating voltage of the microcomputer.