Compound semiconductor MESFET device with passivation film

• US 5,023,676 A
• Filed: 08/01/1989
• Issued: 06/11/1991
• Est. Priority Date: 08/01/1988
• Status: Expired due to Term

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Tatsuta, Shigeru
• Primary Examiner(s): Mintel William
• Application Number:
  US07/387,801
• Time in Patent Office: 679 Days
• Field of Search: 357/22 I, 357/22 J, 357/22 K, 357/60, 357/26, 357/15, 357/22 MD, 357/54, 357/22 S, 357/22 P, 357/22 G
• US Class Current: 257/280
• CPC Class Codes: H01L 23/3157 Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/42316 for field-effect transistors
• CPC Class Codes: H01L 29/475 on AIII-BV compounds
• CPC Class Codes: H01L 29/812 with a Schottky gate H01L29/7725, H01L29/775, H01L29/778, H01L29/806 take precedence; with Schottky contact on top of heterojunction gate H01L29/802
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/13063 Metal-Semiconductor Field-Effect Transistor [MESFET]

Abstract

A metal-semiconductor field effect transistor includes a substrate of a group III-V compound having a zinc blend structure. A gate electrode is provided on the substrate so as to extend in a predetermined direction and a channel region is defined in the substrate in alignment with the gate electrode. A source region is defined in the substrate at one side of the channel region and a drain region is defined in the substrate at the other side of the channel region. A source electrode is provided on the substrate so as to cover a first part of the source region spaced from the gate electrode while leaving a second part of the source region adjacent the gate electrode uncovered, and a drain electrode is also provided on the substrate so as to cover a first part of the drain region spaced from the gate electrode while leaving a second part of the drain region adjacent the gate electrode uncovered. A passivation film of a material experiencing stress during operation is provided so as to cover the second part of the source region and the second part of the drain region. The passivation film comprises an inner area part and a marginal area part designed such that the marginal area part has a different thickness than the inner area part.

Claims

1. A metal-semiconductor field effect transistor, comprising:

a substrate of a group III-V compound semiconductor material having a zinc blend structure;

a gate electrode provided on the substrate so as to extend in a <

011>

direction of the substrate;

a channel region defined in the substrate in alignment with the gate electrode and extending in a <

011>

direction of the substrate;

a source region defined in the substrate at one side of the channel region;

a drain region defined in the substrate at the other side of the channel region;

a source electrode provided on the substrate so as to cover a first part of the source region spaced from the gate electrode while leaving a second part of the source region adjacent the gate electrode uncovered;

a drain electrode provided on the substrate so as to cover a first part of the drain region spaced from the gate electrode while leaving a second part of the drain region adjacent the gate electrode uncovered; and

a passivation film of a material experiencing a compressive stress during operation, said passivation film being provided so as to cover the gate electrode, said second part of the source region and said second part of the drain region, said passivation film comprising an inner area part covering a part of said second part of the source region adjacent the gate electrode and a part of said second part of the drain region adjacent the gate electrode, said film also comprising a marginal area part covering a part of said second part of the source region spaced from the gate electrode and a part of said second part of the drain region spaced from the gate electrode, said marginal area part having a thickness that is substantially less than that of said inner area part.

2. A metal-semiconductor field effect transistor as claimed in claim 1 in which said passivation film comprises silicon nitride.

3. A metal-semiconductor field effect transistor as claimed in claim 1 in which said marginal area part is defined relative to said inner area part by a stepped part across which the thickness of the passivation film changes stepwise.

4. A metal-semiconductor field effect transistor as claimed in claim 1 in which said inner area part of the passivation film has a thickness of about 1000 Å

and said marginal area part has a thickness of about 300 Å

.

5. A metal-semiconductor field effect transistor as claimed in claim 1 in which the thickness of the marginal area part decreases continuously with increased distance from the gate electrode.

6. A metal-semiconductor field effect transistor, comprising:

a substrate of a group III-V compound semiconductor material having a zinc blend structure;

a gate electrode provided on the substrate so as to extend in a <

011>

direction of the substrate;

8. A metal-semiconductor field effect transistor as claimed in claim 6 in which said passivation film comprises silicon oxide.

9. A metal-semiconductor field effect transistor as claimed in claim 6 in which said marginal area part is defined relative to said inner area part by a stepped part across which the thickness of the passivation film changes stepwise.

10. A metal-semiconductor field effect transistor as claimed in claim 6 in which said inner area part of the passivation film has a thickness of about 300 Å

and said marginal area part of the passivation film has a thickness of about 1000 Å

.

11. A metal-semiconductor field effect transistor as claimed in claim 6 in which the thickness of the inner area part increases continuously with increased distance from the gate electrode.

7. a channel region defined in the substrate in alignment with the gate electrode and extending in a <

011>

direction of the substrate;

a source region defined in the substrate at one side of the channel region;

a drain region defined in the substrate at the other side of the channel region;

a source electrode provided on the substrate so as to cover a first part of the source region spaced from the gate electrode while leaving a second part of the source region adjacent the gate electrode uncovered;

a drain electrode provided on the substrate so as to cover a first part of the drain region spaced from the gate electrode while leaving a second part of the drain region adjacent the gate electrode uncovered; and

a passivation film of a material experiencing a tensile stress during operation, said passivation film being provided so as to cover the gate electrode, said second part of the source region and said second part of the drain region, said passivation film comprising an inner area part covering a part of said second part of the second region adjacent the gate electrode and a part of said second part of the drain region adjacent the gate electrode, said film also comprising a marginal area part covering a part of said second part of the source region spaced from the gate electrode and a part of said second part of the drain region spaced from the gate electrode, said inner area part having a thickness that is substantially less than that of said marginal area part.

12. A metal-semiconductor field effect transistor, comprising:

a substrate of a group III-V compound semiconductor material having a zinc blend structure;

a gate electrode provided on the substrate so as to extend in a <

011>

direction of the substrate;

a channel region defined in the substrate in alignment with the gate electrode and extending in a <

011>

direction of the substrate;

a source region defined in the substrate at one side of the channel region;

a drain region defined in the substrate at the other side of the channel region;

a source electrode provided on the substrate so as to cover a first part of the source region spaced from the gate electrode while leaving a second part of the source region adjacent the gate electrode uncovered;

a drain electrode provided on the substrate so as to cover a first part of the drain region spaced from the gate electrode while leaving a second part of the drain region adjacent the gate electrode uncovered; and

a passivation film of a material experiencing a tensile stress during operation, said passivation film being provided so as to cover the gate electrode, said second part of the source region and said second part of the drain region, said passivation film comprising an inner area part covering a part of said second part of the second region adjacent the gate electrode and a part of said second part of the drain region adjacent the gate electrode, said film also having a marginal area part covering a part of said second part of the source region spaced from the gate electrode and a part of said second part of the drain region spaced from the gate electrode, said marginal area part having a thickness that is substantially less than that of said inner area part.

13. A metal-semiconductor field effect transistor, comprising:

a substrate of a group III-V compound semiconductor material having a zinc blend structure;

a gate electrode provided on the substrate so as to extend in a <

011>

direction of the substrate;

a channel region defined in the substrate in alignment with the gate electrode and extending in a <

011>

direction of the substrate;

a source region defined in the substrate at one side of the channel region;

a drain region defined in the substrate at the other side of the channel region;

a source electrode provided on the substrate so as to cover a first part of the source region spaced from the gate electrode while leaving a second part of the source region adjacent the gate electrode uncovered;

a drain electrode provided on the substrate so as to cover a first part of the drain region spaced from the gate electrode while leaving a second part of the drain region adjacent the gate electrode uncovered; and

a passivation film of a material experiencing a compressive stress during operation, said passivation film being provided so as to cover the gate electrode, said second part of the source region and said second part of the drain region, said passivation film comprising an inner area part covering a part of said second part of the second region adjacent the gate electrode and a part of said second part of the drain region adjacent the gate electrode, said film also comprising a marginal area part covering a part of said second part of the source region spaced from the gate electrode and a part of said second part of the drain region spaced from the gate electrode, said inner area part having a thickness that is substantially less than that of said marginal area part.