Method and apparatus for maximizing the transmission capacity of a multi-channel bidirectional communications link

• US 5,023,869 A
• Filed: 03/27/1989
• Issued: 06/11/1991
• Est. Priority Date: 03/27/1989
• Status: Expired due to Term

• Current Assignee: Telecommunications Research Laboratories
• Original Assignee: Telecommunications Research Laboratories
• Inventors: Fraser, George D., Fong, Tommy, Dubuc, Joe P., Krzymien, Witold A., Grover, Wayne D.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Jung, Min
• Application Number:
  US07/329,271
• Time in Patent Office: 806 Days
• Field of Search: 370/84, 370/13, 370/118, 375/7, 375/8, 375/10
• US Class Current: 370/421
• CPC Class Codes: H04L 5/1446 of transmission speed
• CPC Class Codes: H04Q 11/0435 Details
• CPC Class Codes: H04Q 2213/13106 Microprocessor, CPU
• CPC Class Codes: H04Q 2213/13107 Control equipment for a part of the connection, distributed control, co-processing
• CPC Class Codes: H04Q 2213/13109 Initializing, personal profile
• CPC Class Codes: H04Q 2213/1316 Service observation, testing
• CPC Class Codes: H04Q 2213/1319 Amplifier, attenuation circuit, echo suppressor
• CPC Class Codes: H04Q 2213/13199 Modem, modulation
• CPC Class Codes: H04Q 2213/13204 Protocols
• CPC Class Codes: H04Q 2213/13209 ISDN
• CPC Class Codes: H04Q 2213/13213 Counting, timing circuits
• CPC Class Codes: H04Q 2213/13214 Clock signals
• CPC Class Codes: H04Q 2213/13216 Code signals, frame structure
• CPC Class Codes: H04Q 2213/1322 PBX
• CPC Class Codes: H04Q 2213/13292 Time division multiplexing, TDM
• CPC Class Codes: H04Q 2213/1332 Logic circuits
• CPC Class Codes: H04Q 2213/13332 Broadband, CATV, dynamic bandwidth allocation
• CPC Class Codes: H04Q 2213/13396 Signaling in general, in-band signalling
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A method for determining the highest, common bi-directional transmission rate between two stations of an ISDN communications link includes the steps of a) selecting a candidate transmission rate from a range of candidate transmission rates, b) transmitting a test signal at the candidate transmission rate through an attenuator along the link from one of the stations to the other of the stations for a first predetermined time interval, c) determining whether a return signal transmitted by the other station over the link and at the candidate transmission rate has been correctly received at the one station, d) repeating steps a), b) and c) until predetermined criteria have been satisfied; and e) storing the highest candidate transmission rate for which a return signal at that rate was correctly received within the first time interval; and f) removing the attenuator for final verification of operation.

Claims

1. An interface circuit for use in a multi-channel, continuous, baseband transmission system in which communication signals may be transmitted bidirectionally over a communications link between two stations of said system, said interface circuit comprising:

receiver means, having a receiver input and a receiver output, for delivering a signal applied to said receiver input to said receiver output, said receiver means including means responsive to a signal applied to said receiver input for generating a "signal present" output signal and means for acquiring a signal applied to said receiver input and generating a "signal acquired" signal;

said means for acquiring including an adaptive equalizer circuit means for receiving and converging on a signal applied to said receiver input, signal evaluation circuit means for subjecting a signal delivered thereto by said equalizer circuit means to predetermined criteria and producing said "signal acquired" signal when said criteria are satisfied, and clock recovery circuit means for determining the clock of a signal applied to said receiver input and delivering said clock to said equalizer circuit means and said evaluation circuit means;

transmitter means, having a transmitter input and a transmitter output, for delivering a signal received at said transmitter input to said transmitter output for transmission along said link to said other station; and

control means for controlling the mode of operation of said interface circuit wherein said interface circuit is operable in a NORMAL mode in which signals applied to said transmitter input are delivered by said transmitter means to said transmitter output for transmission along said link to said other station and signals received from said link at said receiver input and acquired by said receiver means are delivered to said receiver output, said receiver output delivering the "signal present" output signal and the "signal acquired" signal to said control means; and

wherein said interface circuit is operable in a transmission rate ADAPTATION mode in which, in response to a first predetermined condition, said control means is operable to initiate a transmission rate testing process and subsequent thereto to restore said interface circuit for operation in said NORMAL mode of operation at the highest operable, bi-directional transmission rate determined pursuant to said testing process, or, in response to a second predetermined condition, said control means is responsive to a transmission rate testing process initiated at said other station and subsequent thereto to restore said interface circuit for operation in said NORMAL mode of operation at the highest operable, bi-directional transmission rate determined pursuant to said testing process.

2. An interface circuit as defined in claim 1, said receiver means further including a programmable demultiplexer for demultiplexing a signal acquired by said signal evaluation circuit means.

3. An interface circuit as defined in claim 1, said receiver means further including a switched variable attenuator operable under the control of said control means for attenuating a signal applied to said receiver input.

4. An interface circuit as defined in claim 1, said receiver means further including means for determining the currently received transmission rate.

5. An interface circuit as defined in claim 1, said receiver means further including a programmable demultiplexer for demultiplexing a signal acquired by said signal evaluation circuit means.

6. An interface circuit as defined in claim 5, said receiver means further including a switched variable attenuator operable under the control of said control means for attenuating a signal applied to said receiver input.

7. An interface circuit as defined in claim 6, said receiver means further including a rate counter or rate analyzer for determining the currently received transmission rate.

8. An interface circuit as defined in claim 1, said signal evaluation circuit means being a regenerator, framing and BER logic circuit.

9. An interface circuit for use in a multi-channel, continuous, baseband transmission system in which communication signals may be transmitted bi-directionally over a communications link between two stations of said system, said interface circuit comprising:

control means for controlling the mode of operation of said interface circuit;

receiver means, having a receiver input and a receiver output, for delivering a signal applied to said receiver input to said receiver output, said receiver means including automatic gain control means responsive to a signal applied to said receiver input for delivering a "signal present" output signal to said control means, means for acquiring a signal applied to said receiver input and delivering a "signal acquired" signal to said control means, said means for acquiring including adaptive equalizer circuit means for receiving and converging on a signal applied to said receiver input, signal evaluation circuit means including a regenerator, framing and BER logic circuit for subjecting a signal delivered thereto by said equalizer circuit means to predetermined criteria and producing said "signal acquired" signal when said criteria are satisfied, clock recovery circuit means for determining the clock of a signal applied to said receiver input and delivering said clock to said equalizer circuit means and said evaluation circuit means, a programmable demultiplexer for demultiplexing a signal acquired by said signal evaluation circuit means, a switched variable attenuator for attenuating a signal applied to said receiver input, and means for determining the currently received transmission rate;

transmitter means, having a transmitter input and a transmitter output, for delivering a signal received at said transmitter input to said transmitter output for transmission along said link to said other station, said transmitter means including a controllable output attenuator operable under the control of said control means for attenuating a signal transmitted by said transmitter means, transmit encoding logic means and line driving circuit means operable over a range of transmission rates, a pattern generator for producing test signals, a programmable input multiplexer for delivering to said transmitter circuit means a signal to be transmitted over said link; and

wherein said interface circuit is operable in a NORMAL mode in which signals applied to said transmitter input by said multiplexer are delivered by said transmitter means to said transmitter output for transmission along said link to said other station and signals received from said link at said receiver input and acquired by said receiver means are delivered from said receiver output to said demultiplexer; and

wherein said interface circuit is operable in a transmission rate ADAPTATION mode in which, in response to an adaptation signal applied to said control means, said control means is operable to initiate a transmission rate testing process including transmitting a series of test signals, each said test signals having a unique transmission rate selected from a range of transmission rates and being transmitted for a period of predetermined duration and, after each said period, determine whether a "signal acquired" signal has been from said receiver means, and subsequent thereto to restore said interface circuit for operation in said NORMAL mode of operation at the highest operable, bi-directional transmission rate determined pursuant to said testing process, or, in response to a "no signal" condition of predetermined duration at said receiver input followed by a "signal present" signal and a change in received signal transmission rate, said control means is responsive to a transmission rate testing process by causing said transmitter means to transmit a valid data sequence at the same frequency as that of a currently received test signal as long as said currently received test signal is present at said receiver input and subsequent thereto to restore said interface circuit for operation in said NORMAL mode of operation at the highest operable, bi-directional transmission rate determined pursuant to said testing process.

10. A method for determining the highest, common bi-directional transmission rate between two stations of an ISDN communications link, said method comprising the steps of:

(a) terminating communications between said stations for a first predetermined time interval;

(b) selecting a unique candidate transmission rate from a predetermined range of candidate transmission rates in accordance with an algorithm;

(c) transmitting a test signal at said candidate transmission rate for a second predetermined time interval from one of said stations, through an output attenuator at said one station, along a transmit path in said link to the other of said stations;

(d) while said test signal is being correctly received at said other station, storing the current candidate transmission rate at said second station, and transmitting a return signal at said candidate transmission rate from said other station, along a return path of said link, through an input attenuator at said one station and to said one station;

(e) determining whether a return signal at said candidate transmission rate has been correctly received at said one station within said second predetermined time interval;

(f) repeating steps (b), (c), (d) and (e) when a return signal has not been received within said first time interval, otherwise, performing a verification step including removing said output and input attenuators, re-transmitting a test signal in connection with which a return signal was correctly received at said one station within said first time interval, and waiting a further time interval for a verified return signal transmitted from said other station to said one station;

(g) transmitting a verified return signal from said second station to said first station when both said test signal is correctly received at said second station and the stored current candidate transmission rate remains unchanged during successive predetermined third time intervals;

(h) repeating steps (b), (c), (d), (e), and (f) until predetermined criteria have been satisfied; and

(i) storing at each said station the highest candidate transmission rate for which a return signal at that rate was correctly received at said one station within said first time interval for subsequently transmitting normal communications on said communications link at said rate.

11. A method as defined in claim 10, wherein said first transmission rate is the highest possible transmission rate capable of being transmitted on said link.

12. A method as defined in claim 11, wherein the rate of each said additional signal is less than that of its immediately preceding test signal by a predetermined quantity.

13. A method as defined in claim 10, further including the step of terminating said transmitting steps as soon as a first verified return signal is received at said one station.

14. A method as defined in claim 10, said algorithm being a linear downstepping algorithm wherein the first selected transmission rate is the highest transmission rate possible on said link and each subsequent transmission rate is reduced from an immediately preceding transmission rate by a predetermined quantity.

15. A method as defined in claim 10, said algorithm being a linear upstepping algorithm wherein the first selected transmission rate is the lowest transmission rate possible on said link and each subsequent selected transmission rate is increased over an immediately preceding selected transmission rate by a predetermined amount up a maximum transmission rate.

16. A method as defined in claim 10, said algorithm being a modified binary section search algorithm.

17. A method as defined in claim 10, said algorithm being a random sequence of successive test transmission rates.

18. A method as defined in claim 10, said algorithm being a test of all possible transmission rates and the building of a table of successful and unsuccessful results.