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Self-tuning direct coupled data limiter of a battery saver type paging receiver

  • US 5,025,251 A
  • Filed: 06/29/1989
  • Issued: 06/18/1991
  • Est. Priority Date: 06/29/1989
  • Status: Expired due to Fees
First Claim
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1. A battery saver type paging receiver including:

  • an input section for receiving a paging signal transmitted from an external source, said paging signal including modulated digitally coded data words, and for demodulating said received paging signal to recover an analog signal representing the digitally coded data words;

    a data limiter section for converting the recovered analog signal into a corresponding binary bit stream representing the coded data words of said paging signal; and

    a battery saver section coupled to said input section and said data limiter section and to a battery powered source for cyclically energizing and de-energizing said input and data limiter sections from said battery powered source during awake and sleep periods, respectively, said data limiter section comprising;

    first means operative in a first mode to acquire a peak amplitude from the recovered analog signal and to generate a first digital word representative thereof, said first means including a first storage means for storing the first digital word, said first means operative in a second mode to cause said first storage means to hold the first digital word;

    second means operative in said first mode to acquire a valley amplitude from the recovered analog signal and to generate a second digital word representative thereof, said second means including a second storage means for storing the second digital word, said second means operative in said second mode to cause said second storage means to hold the second digital word;

    said first and second means being each further operative in a third mode to alter the respective first and second word thereof a predetermined count;

    control means responsive to at least one command signal to control the transfer of operation of said first and second means among the first, second and third modes;

    third means for converting the recovered analog signal into its corresponding binary bit stream based on said first and second digital words; and

    means for generating a reference signal wherein the control means is governed by the reference clock signal in controlling the transfer among the modes of the first and second means.

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