Center tapped FET
First Claim
Patent Images
1. A field effect transistor including in combination:
- a first active semiconductor area;
a first source conductor and a first drain conductor located on said first active semiconductor area;
a second active semiconductor area located adjacent to but separated from said first active semiconductor area;
a second source conductor and a second drain conductor located on said second active semiconductor area;
an inactive area located between said first active semiconductor area and said second active semiconductor area;
gate bus means located on said inactive area;
first gate finger contact means extending from said gate bus means in a first direction across a portion of said inactive area and across a portion of said first active semiconductor area between said first source conductor and said first drain conductor;
second gate finger contact means extending from said gate bus means in a direction opposite to said first direction across a portion of said inactive area and across a portion of said second active semiconductor area between said second source area and said second drain area; and
said gate finger contact means and said source and drain conductors all being located in the same plane.
0 Assignments
0 Petitions
Accused Products
Abstract
A FET structure has first and second active areas separated by an inactive area with a gate bus located thereon. Gate fingers extend from the gate bus between source and drain contacts on the active areas. Bridges extend over the gate bus and interconnect the source contacts.
113 Citations
25 Claims
-
1. A field effect transistor including in combination:
-
a first active semiconductor area; a first source conductor and a first drain conductor located on said first active semiconductor area; a second active semiconductor area located adjacent to but separated from said first active semiconductor area; a second source conductor and a second drain conductor located on said second active semiconductor area; an inactive area located between said first active semiconductor area and said second active semiconductor area; gate bus means located on said inactive area; first gate finger contact means extending from said gate bus means in a first direction across a portion of said inactive area and across a portion of said first active semiconductor area between said first source conductor and said first drain conductor; second gate finger contact means extending from said gate bus means in a direction opposite to said first direction across a portion of said inactive area and across a portion of said second active semiconductor area between said second source area and said second drain area; and said gate finger contact means and said source and drain conductors all being located in the same plane. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 16, 17, 18, 19)
-
-
10. A field effect transistor for operating at high power levels at microwave frequencies including in combination:
-
a generally rectangular area of inactive material; gate bus means extending along a first axis over said rectangular area of inactive material; a first area of active semiconductor material having a rectangular area located adjacent to one side of said inactive material; first source and drain contacts located on said first area of active semiconductor material; a second area of active semiconductor material having a rectangular area located adjacent to another side of said inactive material, said inactive material thereby separating said first and second areas of active semiconductor material to facilitate power dissipation by said first and second active areas of semiconductor material; second source and drain contacts located on said second area of active semiconductor material; first gate finger means extending perpendicular to said first axis in a first direction between said first source and drain contacts; second gate finger means extending perpendicular to said first axis in a second direction between said second source and drain contacts; a plurality of bridging means extending over said rectangular inactive area and interconnecting said first source contacts with said second source contacts and said first drain contacts with said second drain contacts; and said gate finger means and said source and drain contacts all being located in the same plane. - View Dependent Claims (11, 12, 13, 14, 15)
-
-
20. A field effect transistor for operating at microwave frequencies including in combination:
-
an area of inactive material having opposite sides; gate bus means extending along a first axis over said area of inactive material; a first area of active semiconductor material having a rectangular area located adjacent to one side of said area of inactive material; first source and drain contacts located on said first area of active semiconductor material; a second area of active semiconductor material having a rectangular area located adjacent to another side opposite to said one side of said inactive material; second source and drain contacts located on said second area of active semiconductor material; first gate finger means extending perpendicular to said first axis in a first direction between said first source and drain contacts; second gate finger means extending perpendicular to said first axis in a second direction between said second source and drain contacts; first means interconnecting said first source contacts with said second source contacts; second means interconnecting said first drain contacts with said second drain contacts; and said gate finger means and said source and drain contacts all being located in the same plane. - View Dependent Claims (21, 22, 23, 24, 25)
-
Specification