Built-in current testing of integrated circuits
First Claim
Patent Images
1. A semiconductor integrated circuit comprising:
- a main circuit assembly and a built-in current testing fault-detecting assembly on a unitary substrate;
said fault-detecting assembly being connected in circuit with at least a portion of said main circuit assembly to detect the quiescent current flow through said integrated circuit portion a predetermined period after the application of timing signals to said built-in current testing fault-detecting assembly;
said fault-detecting assembly and integrated circuit portion being connected in series between local ground and the global ground of said integrated portion; and
said fault-detecting assembly being responsive to abnormal quiescent current flow through said integrated circuit portion while ignoring normal high operational currents in said integration circuit during the timing period as an indication of defects within said integrated circuit portion;
whereby the speed of said fault detecting assembly matches the circuit under test.
1 Assignment
0 Petitions
Accused Products
Abstract
A built in current sensor on a unitary substrate with an integrated circuit is provided to sense abnormal quiescent current flow through the integrated circuit after a timing phase as an indication of defects such as shorts and open circuits, while ignoring normal high current peaks. A comparator is provided along with an adjustable reference current to provide a virtual ground voltage which represents that induced by a normal quiescent current through a fault-free integrated circuit. A breaker circuit may be provided for indication, or power disconnection of the integrated circuit, upon the occurrence of current flow above a predetermined value.
-
Citations
17 Claims
-
1. A semiconductor integrated circuit comprising:
-
a main circuit assembly and a built-in current testing fault-detecting assembly on a unitary substrate; said fault-detecting assembly being connected in circuit with at least a portion of said main circuit assembly to detect the quiescent current flow through said integrated circuit portion a predetermined period after the application of timing signals to said built-in current testing fault-detecting assembly; said fault-detecting assembly and integrated circuit portion being connected in series between local ground and the global ground of said integrated portion; and said fault-detecting assembly being responsive to abnormal quiescent current flow through said integrated circuit portion while ignoring normal high operational currents in said integration circuit during the timing period as an indication of defects within said integrated circuit portion; whereby the speed of said fault detecting assembly matches the circuit under test. - View Dependent Claims (2, 3, 4, 5, 6, 12, 13, 14)
-
-
7. A semiconductor integrated circuit comprising:
-
a main circuit assembly and a built-in current testing fault-detecting assembly on a unitary substrate; said fault-detecting assembly being connected in circuit with at least a portion of said main circuit assembly to detect the quiescent current flow through said integrated circuit portion; said fault-detecting assembly and integrated circuit portion being connected in series between local ground and the global ground of said integrated portion; said fault-detecting assembly including a differential amplifier responsive to abnormal quiescent current flow through said integrated circuit portion while ignoring normal high operational currents in said integration circuit as an indication of defects within said integrated circuit portion; and a transistor connected between virtual ground and global ground which is responsive to the quiescent current flow through said integrated circuit; whereby the magnitude of the abnormal current flow through said fault detecting assembly is indicative of the nature of the fault in said integrated circuit. - View Dependent Claims (8, 9, 10, 11, 15, 16, 17)
-
Specification