Automatic calibration device for direct spectrum spread receiver

• US 5,029,181 A
• Filed: 10/25/1990
• Issued: 07/02/1991
• Est. Priority Date: 07/17/1989
• Status: Expired due to Term

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Corporation
• Inventors: Nakano, Masao, Endo, Akihiko, Takeda, Hiroshi
• Primary Examiner(s): Tarcza, Thomas H.
• Assistant Examiner(s): SWANN, TOD R
• Application Number:
  US07/604,988
• Time in Patent Office: 250 Days
• Field of Search: 375/1
• US Class Current: 375/147
• CPC Class Codes: H04B 1/7085 using a code tracking loop, e.g. a delay-locked loop

Abstract

A simulated reception signal is produced by modulating an AC signal having the same frequency as the reception frequency with a modulating signal produced using two pseudo noise codes delayed by 1/2 or 3 chips. In a calibrating mode, in which the simulated reception signal is chosen, a reference voltage to a comparator for synchronization detection and an output voltage of a differential amplifier for synchronization holding are stored in a CPU. In a receiving mode, in which an actual reception signal is chosen, the CPU controls the comparator and a pseudo noise generator which is included in a delay lock loop on the basis of the stored data.

Claims

1. An automatic calibration device for a direct spectrum spread receiver which restores an information signal in a transmission signal spread in accordance with a wide band spreading code by performing reverse spreading, comprising:

receiving means for receiving the transmission signal and producing a reception signal;

switch means for changing over between the reception signal from the receiving means and a simulation signal from simulation signal generating means;

pseudo noise generating means for generating a pseudo noise code corresponding to the spreading code;

shifting means for producing delayed pseudo noise codes having different delay times on the basis of the pseudo noise code from the pseudo noise generating means;

simulation signal generating means for producing the simulation signal on the basis of two delayed pseudo noise codes from the shifting means;

first comparing means for producing a sync detection signal on the basis of an output signal of the switch means, one delayed pseudo noise code from the shifting means, and a reference voltage from a control means;

second comparing means for producing a sync holding signal on the basis of the output signal of the switch means and two delayed pseudo noise codes from the shifting means; and

the control means for receiving the sync detection signal from the first comparing means and the sync holding signal from the second comparing means, producing the reference voltage to be provided to the first comparing means, and controlling the switch means and the pseudo noise generating means;

wherein

in a calibrating mode, the control means controls the switch means to choose the simulation signal, and stores the reference voltage being provided to the first comparing means and the sync holding signal; and

in a receiving mode, the control means controls the switch means to choose the reception signal, provides the stored reference voltage to the first comparing means, and controls the pseudo noise generating means on the basis of the stored sync holding signal so that synchronization of the receiver is held.

2. The device according to claim 1, wherein the first comparing means comprises multiplying means for multiplies the output signal of the switch means by a 1/2-chip delayed pseudo noise code, and a comparator for comparing a multiplication result with the reference voltage from the control means to produce the sync detection signal.

3. The device according to claim 1, wherein the second comparing means comprises first multiplying means for multiplying the output signal of the switch means by a 1-chip delayed pseudo noise code, second multiplying means for multiplying the output signal of the switch means by a nondelayed pseudo noise code, and a differential amplifier for comparing multiplication results to produce the sync holding signal.

4. The device according to claim 1, wherein the simulation signal generating means comprises an oscillator for producing an AC signal having a frequency identical to the reception signal, attenuating means for attenuating a 1/2-chip delayed pseudo noise code and a 3-chip delayed pseudo noise code, an adder for adding attenuated results to each other, and a multiplier for multiplying the AC signal from the oscillator by an added result to produce the simulation signal.

5. The device according to claim 1, wherein the pseudo noise generating means comprises a D/A converter receiving an output signal of the control means, a voltage-controlled oscillator receiving an output signal of the D/A converter, and a pseudo noise generator for producing the pseudo noise code in response to an output signal of the voltage-controlled oscillator.

6. The device according to claim 5, wherein the control means controls the D/A converter so as to hold the synchronization of the receiver.