Process for forming a feature on a substrate without recessing the surface of the substrate

• US 5,034,351 A
• Filed: 10/01/1990
• Issued: 07/23/1991
• Est. Priority Date: 10/01/1990
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Woo, Michael P., Sun, Shih-Wei
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Picardat, Kevin M.
• Application Number:
  US07/590,856
• Time in Patent Office: 295 Days
• Field of Search: 437/228, 437/41, 437/31, 437/180, 437/184, 437/186, 437/913, 437/912, 437/187, 437/190, 437/233, 148/DIG. 50
• US Class Current: 438/202
• CPC Class Codes: H01L 21/033 comprising inorganic layers
• CPC Class Codes: H01L 21/28123 Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
• CPC Class Codes: H01L 21/28525 the conductive layers comprising semiconducting material H01L21/28518, H01L21/28537 take precedence
• CPC Class Codes: H01L 21/8249 Bipolar and MOS technology
• CPC Class Codes: H01L 29/66583 with initial gate mask or masking layer complementary to the prospective gate location, e.g. with dummy source and drain contacts
• CPC Class Codes: Y10S 148/05 Etch and refill

Abstract

A process for forming a feature on a substrate without etching into the surface of the substrate and causing recessed regions. A first layer of material is deposited to overlie the substrate and is formed of a different material to the substrate. The first layer is patterned, using conventional photolithography, to form windows in the first layer of material which expose a substrate surface. The etch selectively etches the first layer of material without substantially etching into the substrate material. A second layer of material, which is the same material as the substrate, is deposited to overlie the first layer of material and makes physical contact with the substrate through the windows patterned in the first layer. The second layer is blanket etched so that isolated regions are formed in regions defined by the windows patterned in the first layer.

Claims

1. A process for forming a feature of same material as a substrate material directly on a surface of the substrate material without recessing the surface of the substrate material, comprising the sequential steps of:

providing a predetermined semiconductor material as the substrate material, the substrate material having a first etch rate when exposed to an etchant;

providing a first layer of material dissimilar from the substrate material overlying the surface of the substrate material, the first layer of material having a second etch rate when exposed to an etchant which is substantially faster than the first etch rate;

patterning the first layer of material in accordance with a predetermined pattern to remove portions of the first layer of material by etching the portions of the first layer of material at the second etch rate without affecting the surface of the substrate material and avoiding recessing the substrate material since the first etch rate is much slower than the second etch rate;

depositing a second layer of material overlying the first layer of material and making physical contact with the substrate material at predetermined portions in accordance with the predetermined pattern, the second layer of material functioning as the feature and being a same type of semiconductor material as the substrate material but having different electrical and physical characteristics than the substrate material; and

removing all remaining portions of the first layer of material to complete formation of the feature of the same type of material without having to etch the second layer of material selective to the substrate material at any time during the process, the feature functioning as a single structural element of a bipolar transistor.

2. The process of claim 1 further comprising the step of:

prior to removing all remaining portions of the first layer of material, etching any portion of the second layer of material overlying the first layer of material to substantially planarize a top surface of the first and second layers of material.

3. The process of claim 1 further comprising the step of:

implanting and activating the second layer of material with a dopant material of predetermined conductivity while the first layer of material blocks the dopant material from the substrate.

4. The process of claim 1 further comprising the step of:

performing further processing to fabricate a semiconductor feature by using any remaining portion of the second layer of material substantially without recessing the surface of the semiconductor device substrate.

5. The process of claim 1 wherein said step of depositing a second layer of material comprises a selective deposition.

6. The process of claim 1 wherein said step of depositing a second layer of material comprises a blanket deposition and an etch-back process.

7. The process of claim 1 wherein the second etch rate is substantially ten times faster than the first etch rate.

8. A process for forming a feature of a same material as a substrate material directly on a surface of the substrate material without recessing the surface of the substrate material, comprising the sequential steps of:

providing a BiCMOS semiconductor substrate material as a substrate, the BiCMOS semiconductor substrate material having a surface and a first region for CMOS processing and a second region for bipolar processing, the layer of material having a first etch rate when exposed to an etchant;

providing a first layer of material dissimilar from the BiCMOS semiconductor substrate material and overlying the surface of the BiCMOS semiconductor substrate material, the second layer of material having a second etch rate substantially faster than the first etch rate;

patterning the first layer of material in accordance with a predetermined pattern to remove portions of the first layer of material overlying the second region of the BiCMOS semiconductor substrate material without affecting the surface of the second region of the BiCMOS semiconductor substrate material since the first etch rate is much slower than the second etch rate and avoiding recessing the second region of the BiCMOS semiconductor substrate material;

depositing a second layer of material overlying the first layer of material and making physical contact with the second region of the BiCMOS semiconductor substrate material at predetermined portions in accordance with the predetermined pattern, the second layer of material functioning as the feature and being a same type of semiconductor material as the BiCMOS semiconductor substrate material but having different electrical and physical characteristics than the BiCMOS semiconductor substrate material;

removing all remaining portions of the first layer of material by etching the remaining portions of the first layer of material at the second etch rate and without recessing the BiCMOS semiconductor substrate material since the first etch rate is much slower than the second etch rate to form at least one region of the second layer of material as the feature, the feature being formed without etching the second layer of material selective to the substrate material at any time during the process and functioning as a single structural element of a bipolar semiconductor device; and

performing further processing steps to fabricate both an MOS semiconductor device and the bipolar semiconductor device, by using any remaining portion of the second layer of material substantially without recessing the surface of the semiconductor device substrate.

9. The process of claim 8 wherein the step of depositing the second layer of material further comprises depositing a layer of posilicon.

10. A process for forming a feature directly on a surface of a substrate material without inadvertently etching into the surface of the substrate material, comprising the sequential steps of:

providing a silicon substrate having a first etch rate when exposed to an etchant;

providing a first layer of material dissimilar from silicon and overlying a surface of the silicon substrate, the first layer of material having a second etch rate substantially faster than the first etch rate when exposed to the etchant;

patterning the first layer of material in accordance with a predetermined pattern to remove portions of the first layer of material by etching the first layer at the second etch rate and without affecting the surface of the silicon substrate which etches at the first etch rate and avoiding recessing the silicon substrate;

depositing a second layer of material overlying the first layer of material and making physical contact with the silicon substrate at predetermined portions in accordance with the predetermined pattern, the second layer of material functioning as the feature and being polysilicon but having different electrical characteristics than the silicon substrate; and

removing portions of the first layer of material adjacent the feature, the feature functioning as a single structural element of a bipolar transistor and having been formed without etching the polysilicon second layer of material selective to the silicon substrate.