Anti-copying video signal processing
First Claim
1. A method of preventing counting circuitry included in the vertical synchronizing circuit of a video receiver from generating vertical control signals at a fixed, standard rate when a video signal transmitted to said video receiver exhibits a changing field interval which varies above and below a fixed, standard period, said method comprising the steps of deleting at least one of the vertical pulses in the vertical period of each field interval of said transmitted video signal;
- and deleting plural equalizing pulses in the post equalizing period following said vertical pulses in said field interval.
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Accused Products
Abstract
Counting circuitry in the vertical synchronizing circuit of a video receiver is prevented from generating vertical control signals at a fixed, standard periodicity when the video signal transmitted to that receiver exhibits a changing field interval which varies above and below that standard period. At least one of the vertical pulses in the vertical period of each field interval as well as plural equalizing pulses in the post equalizing period in that field interval are deleted from the video signal. To minimize perturbations in the video picture displayed from that video signal, the time of occurrence of the first vertical pulse in selected field intervals is shifted.
69 Citations
58 Claims
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1. A method of preventing counting circuitry included in the vertical synchronizing circuit of a video receiver from generating vertical control signals at a fixed, standard rate when a video signal transmitted to said video receiver exhibits a changing field interval which varies above and below a fixed, standard period, said method comprising the steps of deleting at least one of the vertical pulses in the vertical period of each field interval of said transmitted video signal;
- and deleting plural equalizing pulses in the post equalizing period following said vertical pulses in said field interval.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of controlling vertical and equalizing pulses in the vertical synchronizing interval of a video signal transmitted with a changing frame period which varies above and below a fixed standard period to enable a video picture to be displayed therefrom on a conventional television receiver but prevent that video signal from being copied on a conventional video recorder, said method comprising the steps of generating less than a standard number of vertical pulses in each vertical period of the vertical synchronizing interval;
- selectively shifting the beginning of selected vertical periods;
generating less than a standard number of post equalizing pulses in each vertical synchronizing interval; and
combining the video signal with the generated vertical and post equalizing pulses, whereby a vertical synchronizing circuit of a television receiver is inhibited from locking onto the vertical synchronizing interval of said video signal and thereby generate vertical control signals at said fixed, standard period, and whereby perturbations in the displayed video picture attributed to a change in the frame period of the video signal are minimized. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
- selectively shifting the beginning of selected vertical periods;
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24. A method of generating pre-equalizing, post-equalizing and vertical pulses for insertion into the vertical synchronizing interval of a transmitted video signal, comprising the steps of counting horizontal line intervals in each field of the video signal;
- generating start equalizing representations representing the start of respective pre-equalizing and post-equalizing pulses at predetermined line counts and omitting selected ones of the start equalizing representations at preselected line counts;
generating start vertical representations representing the start of respective vertical pulses at other predetermined line counts and omitting selected ones of the start vertical representations at preselected ones of said other line counts;
counting clock signals in response to each start equalizing representation and each start vertical representation to produce clock counts;
sensing when the clock count reaches a first count following a start equalizing representation and a second count following a start vertical representation;
generating equalizing pulses of durations determined by said first count; and
generating vertical pulses of durations determined by said second count, whereby equalizing and vertical pulses are not generated when start equalizing and start vertical representations are omitted. - View Dependent Claims (25, 26, 27, 28, 29)
- generating start equalizing representations representing the start of respective pre-equalizing and post-equalizing pulses at predetermined line counts and omitting selected ones of the start equalizing representations at preselected line counts;
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30. Apparatus for preventing counting circuitry included in the vertical synchronizing circuit of a video receiver from generating vertical control signals at a fixed, standard rate when a video signal transmitted to said video receiver exhibits a changing field interval which varies above and below a fixed, standard period, said apparatus comprising synchronizing signal generating means for controlling the synchronizing signals included in the transmitted video signal, including vertical pulse control means for deleting at least one of the vertical pulses in the vertical period of each field interval of said transmitted video signal;
- and equalizing pulse control means for deleting plural equalizing pulses in the post equalizing period following said vertical pulses in said field interval.
- View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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41. Apparatus for generating vertical and equalizing pulses inserted into the vertical synchronizing interval of a video signal transmitted with a changing frame period which varies above and below a fixed standard period to enable a video picture to be displayed therefrom on a conventional television receiver but prevent that video signal from being copied on a conventional video recorder, said apparatus comprising vertical pulse generating means for generating less than a standard number of vertical pulses in each vertical period of the vertical synchronizing interval;
- shift means for selectively shifting the beginning of selected vertical periods;
equalizing pulse generating means for generating less than a standard number of post equalizing pulses in each vertical synchronizing interval; and
combining means for combining the video signal with the generated vertical and post equalizing pulses, whereby a vertical synchronizing circuit of a television receiver is inhibited from locking onto the vertical synchronizing interval of said video signal and thereby generate vertical control signals at said fixed, standard period, and whereby perturbations in the displayed video picture attributed to a change in the frame period of the video signal are minimized. - View Dependent Claims (42, 43, 44, 45, 46, 47, 48, 49, 50, 51)
- shift means for selectively shifting the beginning of selected vertical periods;
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52. Apparatus for generating pre-equalizing, post-equalizing and vertical pulses for insertion into the vertical synchronizing interval of a transmitted video signal, comprising line count means for counting horizontal line intervals in each field of the video signal;
- start equalizing means for generating start equalizing representations representing the start of respective pre-equalizing and post-equalizing pulses at predetermined line counts and for omitting selected ones of the start equalizing representations at preselected line counts;
start vertical means for generating start vertical representations representing the start of respective vertical pulses at other predetermined line counts and for omitting selected ones of the start vertical representations at preselected ones of said other line counts;
a source of clock signals;
clock counting means for counting clock signals in response to each start equalizing representation and each start vertical representation to produce clock counts;
sense means for sensing when the clock count reaches a first count following a start equalizing representation and a second count following a start vertical representation;
equalizing pulse generating means for generating equalizing pulses of durations determined by said first count; and
vertical pulse generating means for generating vertical pulses of durations determined by said second count, whereby equalizing and vertical pulses are not generated when start equalizing and start vertical representations are omitted. - View Dependent Claims (53, 54, 55, 56, 57)
- start equalizing means for generating start equalizing representations representing the start of respective pre-equalizing and post-equalizing pulses at predetermined line counts and for omitting selected ones of the start equalizing representations at preselected line counts;
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58. Apparatus for preventing counting circuitry included in the vertical synchronizing circuit of a video receiver from generating vertical control signals at a fixed, standard rate when a video signal transmitted to said video receiver exhibits a changing field interval which varies above and below a fixed, standard period, said apparatus comprising profile generating means for generating a profile representing the characteristics of said changing field interval, including the rate at which said field interval changes and the maximum and minimum periods of said field interval;
- control means for varying said field interval in accordance with said profile such that said field interval is equal to said standard period for no more than a limited number of successive field intervals; and
means for transmitting the varying field interval.
- control means for varying said field interval in accordance with said profile such that said field interval is equal to said standard period for no more than a limited number of successive field intervals; and
Specification