Multiple mode-set for IC chip

• US 5,036,495 A
• Filed: 12/28/1989
• Issued: 07/30/1991
• Est. Priority Date: 12/28/1989
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hovis, William P., Busch, Robert E., Thoma, Endre P., Redman, Theodore M., Yankosky, James A.
• Primary Examiner(s): Popek, Joseph A.
• Assistant Examiner(s): Lane, Jack A.
• Application Number:
  US07/469,880
• Time in Patent Office: 579 Days
• Field of Search: 365/233, 365/189.02, 365/189.03, 365/233.5
• US Class Current: 365/233.14
• CPC Class Codes: G11C 11/4076 Timing circuits for regeneration management G11C11/406
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: G11C 7/22 Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management

Abstract

A method and device for setting at least three operating modes of a memory device is provided. The voltage signal is sensed at a first input and an enable signal is sensed at a second input. When an enable signal is received at a second input the memory device operates at the first operating mode if the voltage state at the first input is low; it operates at a second mode if the voltage state at the second is high; and it operates at a third operating mode if the voltage at the first input changes after the enable signal is received at the input. Also a four mode operation can be achieved.

Claims

1. A method for setting various operating modes of a memory device comprising the steps of:

monitoring the voltage state at a first input to the memory device when an enable signal has been received and held active at a second input to the memory device;

operating the memory device in a first operating mode if the voltage state of the first input is at a first value;

operating a memory device in a second operating mode different from said first operating mode if the voltage state of the first input is at a second value different from the first value; and

operating the memory in a third operating mode different from said first and second operating modes if the voltage state of the first input changes while the enable signal is received and held active at the second input.

2. The method as defined in claim 1 wherein the memory device is returned to the first mode if the enable signal is received at the second input when the voltage state of the first input is at said first value.

3. A device for setting various operating modes of a memory device responsive to changes in voltage states wherein the voltage state is monitored at a first input to the memory device when an enable signal has been received and held active at a second input to the memory device comprising:

means to monitor the voltage state at said first input pad, means to monitor the voltage state of said enable signal at said second input pad, circuit means connected to said first and second input pads and to first and second output lines to provide a first pair of output signals on said first and second output lines to the memory device if the voltage state at the first pad is at a first value and a second pair of output signals different from said first pair of output signals on said first and second output lines if the voltage state is at a second value different from the first value, and a third pair of output signals different from said first and second pairs of output signals on said first and second output lines if the voltage state of the first input pad changes while the enable signal is received and held active at said second input pad to thereby provide selected modes of operation.

4. The device as defined in claim 3 including means to return the device to the first mode if the enable signal is received at the second input when the voltage state of the first input is at said first value.

5. The device as defined in claim 4 including latch means to maintain said circuit means in the selected mode of operation.

6. The device as defined in claim 4 including a sample and hold circuit, the input of which is connected to the first input pad to detect incoming voltage levels.

7. A method for setting various operating modes of a memory device comprising the steps of:

monitoring the voltage state at a first input to the memory device when an enable signal has been received and held active at a second input to the memory device;

operating the memory device in a first operating mode if the voltage state of the first input is at a first value;

operating a memory device in a second operating mode different from said first operating mode if the voltage state of the first input is at a second value different from the first value;

operating the memory in a third operating mode different from said first and second operating modes if the voltage state of the first input changes from the first value to the second value while the enable signal is received and held active at the second input, and operating the memory in a fourth operating mode different from said first, second and third operating mode if the voltage state at the first input changes from the second value to the first value while the enable signal is received and held active at the second input.

8. A device for setting various operating modes of a memory device responsive to changes in voltage states wherein the voltage state is monitored at a first input to the memory device when an enable signal has been received and held active at a second input to the memory device comprising:

means to monitor the voltage state at said first input pad, means to monitor the voltage state of said enable signal at said second input pad, circuit means connected to said first and second input pads and to first and second output lines to provide a first pair of output signals on said first and second output lines to the memory device if the voltage state at the first pad is at a first value and a second pair of output signals different from said first pair of output signals on said first and second output lines if the voltage state is at a second value different from the first value, a third pair of output signals different from said first and second pairs of output signals on said first and second output lines if the voltage state of the first input pad changes from the first value to the said second value while the enable signal is received and held active at said second pad, and a fourth pair of output signals different from said first, second and third pairs of output signals on said first and second output lines if the voltage state at the first pad changes from the second value to the first value while the enable signal is received and held active at said second pad to thereby provide selected modes of operation.