Lead frame and semiconductor device using the same

• US 5,041,901 A
• Filed: 05/02/1990
• Issued: 08/20/1991
• Est. Priority Date: 05/10/1989
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Kitano, Makoto, Nishimura, Asao, Shimizu, Ichio, Yaguchi, Akihiro, Hoshi, Akio, Kawai, Sueo
• Primary Examiner(s): LaRoche, Eugene R.
• Assistant Examiner(s): RATLIFF, REGINALD A
• Application Number:
  US07/518,410
• Time in Patent Office: 475 Days
• Field of Search: 357/67, 357/71, 357/70
• US Class Current: 257/779
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/49582 Metallic layers on lead frames
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00013 Fully indexed content
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 2201/10772 Leads of a surface mounted component bent for providing a gap between the lead and the pad during soldering
• CPC Class Codes: H05K 2201/10909 Materials of terminal, e.g. of leads or electrodes of components
• CPC Class Codes: H05K 2201/2081 Compound repelling a metal, e.g. solder
• CPC Class Codes: H05K 3/3426 characterised by the leads
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A lead frame having a plurality of inner leads and outer leads, said outer leads being subjected to surface treatment for improving solder wettability at an end portion and to sruface treatment for suppressing solder wettability at least at a portion neighboring to the end portion, or said outer leads being bent 4 times or more, is effective for improving thermal fatigue life and reliability when applied to a semi-conductor device.

Claims

1. A lead frame comprising a plurality of inner leads to be packaged and a plurality of outer leads, each end portion of said outer leads being for connection to a substrate by soldering and having a surface which the relatively good solder wettability from being subjected to surface treatment so as to improve solder wettability at least in the case of solder wettability of said outer leads being insufficient, and each of said outer leads having a portion neighboring to said end portion thereof which has a surface with relatively poor solder wettability from being subjected to surface treatment so as to suppress solder wettability.

2. A lead frame according to claim 1, wherein the surface of each end portion is solder comprising lead and tin.

3. A lead frame according to claim 1, further comprising a chip pad formed in the center of the lead frame and wherein said plurality of inner leads are arranged around said chip pad symmetrically or radiately.

4. A lead frame according to claim 1, wherein said outer leads are bent a predetermined distance form the ends thereof, and wherein the length of said end portion surface of each lead which has a relatively good solder wettability is in the range of 25% to 45% of the distance from the end of the lead to the point of the bend.

19. A lead frame according to claim 1, wherein the surface having relatively good solder wettability is a metal coating on the outer lead as a result of solder plating, solder dipping or nickel plating.

20. A lead frame according to claim 1, wherein the neighboring portion of each outer lead is coated by one of resin coating, aluminum plating, aluminum sputtering, or oxidation to suppress the solder wettability of the underlying material of the outer lead.

5. A semiconductor device comprising at least one semiconductor chip, a lead frame having a plurality of inner leads, wires electrically connecting inner leads of said lead frame to said chip, and an encapsulant encapsulating the chip, the inner leads and wires, said lead frame further comprising a plurality of outer leads, each end portion of said outer leads being for connection to a substrate by soldering and having a surface which has relatively good solder wettability from being subjected to surface treatment so as to improve solder wettability at least in the case of solder wettability being insufficient, and each of said outer leads having a portion neighboring to said end portion thereof which has a surface with relatively poor solder wettability from being subjected to surface treatment so as to suppress solder wettability.

6. A semiconductor device according to claim 5, wherein the surface of each end portion is solder comprising lead and tin.

7. A semicondcutor device according to claim 5, wherein the encapsulant is a resin.

8. A semiconductor device according to claim 5, further comprising a chip pad formed in the center of the lead frame and wherein said plurality of inner leads are arranged around said chip pad symmetrically or radiately.

9. A semiconductor device according to claim 5, wherein said outer leads are bent a predetermined distance from the ends thereof, and wherein the length of said end portion surface of each lead which has a relatively good solder wettability is in the range of 25% to 45% of the distance from the end of the lead to the point of the bend.

10. A semiconductor device comprising at least one semiconductor chip, a lead frame having a plurality of inner leads and a plurality of outer leads, wires electrically connecting inner leads of said lead frame to said chip, and an encapsulant encapsulating the chip, the inner leads and the wire, said outer leads each having a surface on an end portion thereof with relatively good solder wettability from being subjected to surface treatment so that it can be wetted with solder comprising lead and tin, said end portion of the outer lead extending from the end a distance in the range of 25% to 45% of the distance from the end to a point of the outer lead to be bent and at least each portion neighboring to said end portions having a surface with relatively poor solder wettability from being subjected to surface treatment so as to suppress wettability for solder comprising lead and tin.

11. A semiconductor device according to claim 10, wherein the device is a small outline I-leaded package.

12. A semiconductor device according to claim 10, wherein the device is a quad flat I-leaded package.

13. A semiconductor device comprising at least one semiconductor chip, a lead frame having a plurality of inner leads and a plurality of outer leads, wires electrically connecting inner leads of said lead frame to said chip, and an encapsulant encapsulating the chip, the inner leads and the wire, each of said outer leads being bent at least 4 times and having an end horizontal portion to be face bonded to a substrate, with the position of a third bending portion from the end being higher than the end horizontal portion.

14. A semiconductor device according to claim 13, wherein the device is a small outline package.

15. A semiconductor device according to claim 13, wherein the device is a quad flat package.

18. A semiconductor device according to claim 13, wherein at least a portion of an outer lead neighboring to a portion to be face bonded by soldering has a surface with relatively poor solder wettability from being subjected to surface treatment for suppressing solder wettability.

16. A lead frame comprising a plurality of inner leads to be packaged and a plurality of outer leads, each outer lead being bent at least 4 times and having an end horizontal portion to be face bonded to a substrate.

17. A lead frame according to claim 16, further comprising a chip pad formed in the center of the lead frame and a plurality of inner leads arranged around the chip portion symmetrically or radiately.