Cardiac mapping system simulator

• US 5,041,973 A
• Filed: 05/01/1989
• Issued: 08/20/1991
• Est. Priority Date: 10/25/1988
• Status: Expired due to Fees

• Current Assignee: London Health Sciences Centre
• Original Assignee: London Health Association
• Inventors: Brown, Jonathan P., Lebron, Fernando C.
• Primary Examiner(s): Smith, Jerry
• Assistant Examiner(s): Cass, Russell
• Application Number:
  US07/345,979
• Time in Patent Office: 841 Days
• Field of Search: 364/413.02, 364/413.05, 364/578, 128/642, 434/272
• US Class Current: 703/11
• CPC Class Codes: A61B 5/319 Circuits for simulating ECG signals
• CPC Class Codes: G16H 40/40 for the management of medical equipment or devices, e.g. scheduling maintenance or upgrades
• CPC Class Codes: G16H 50/50 for simulation or modelling of medical disorders
• CPC Class Codes: G16Z 99/00 Subject matter not provided for in other main groups of this subclass

Abstract

A cardiac mapping system simulator comprising a microprocessor for simulating the electrical signal propagation of a heartbeat as it moves across the surface of a heart. A series of impulses that mimic the electrophysiological waveform are generated forming a two-dimensional map depicting heart activity. The series of pulses are generated in accordance with predetermined patterns and applied to the inputs of a cardiac mapping system or electrophysiology (E.P.) lab equipment in order to assess the operating condition of the cardiac mapping system or E.P. lab equipment prior to use on patients.

Claims

1. A biomedical mapping simulator for generating a pattern of simulated electrophysiological impulses corresponding to a two-dimensional timing map for application to an electrophysiological impulse display device, comprising:

(a) programmable means for generating a succession of digital signals,

(b) circuit means for receiving said succession of digital signals and in response generating a succession of output signals on predetermined outputs thereof, said outputs being arranged to form a two-dimensional array, and

(c) means for shaping said output signals to resemble said electrophysiological impulses and applying the shaped output signals to said display device, said shaped output signals representing isochronal lines on said timing map.

2. An apparatus as defined in claim 1, wherein said programmable means further comprises a microprocessor programmed for generating said digital signals.

3. An apparatus as defined in claim 2, wherein said circuit means further comprises:

(a) a plurality of latches for receiving and latching said succession of digital signals, and

(b) means for enabling respective ones of said plurality of latches according to a predetermined sequence for generating said succession of output signals.

4. An apparatus as defined in claim 3, wherein respective ones of said latches correspond to respective rows in said array and successive outputs of each said latches correspond to respective column elements in corresponding ones of said rows.

5. An apparatus as defined in claim 3, wherein said means for enabling further comprises a decoder for receiving predetermined additional digital signals from said programmable means and in response generating predetermined select signals for enabling said respective ones of said plurality of latches.

6. An apparatus as defined in claim 1, wherein said means for shaping further comprises a plurality of RC networks for filtering said output signals and in response generating respective bipolar pulses resembling said electrophysiological impulses.

7. An apparatus as defined in claim 1, further comprising means for applying operating power to said programmable means and said circuit means for a predetermined length of time sufficient to generate said output signals, and thereafter ceasing application of said operating power to said programmable means and said circuit means.

8. An apparatus as defined in claim 1, wherein said circuit means further comprises seven 8-bit latches for generating said output signals associated with seven respective rows of said array, each of said rows comprising eight elements corresponding to respective outputs of said latches.

9. A method for generating a pattern of simulated electrophysiological impulses corresponding to a two-dimensional timing map, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array, and

(c) shaping said digital signals to resemble electrophysiological impulses, said shaped digital signals representing isochronal lines on said timing map.

10. A method as defined in claim 9, further comprising the step of loading a sequence of logic high digital signals into each bit location of each of said latches, whereby a pattern of logic high impulses is generated within said array.

11. A method as defined in claim 9, further comprising the step of arranging said latches into seven rows of eight bit locations each.

12. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) loading a sequence of logic high digital signals into a least significant bit location of each of said latches, and loading a sequence of logic low digital signals into remaining ones of said bit locations, and

(e) successively loading said sequence of logic high digital signals into successively more significant bit location of each of said latches, and loading said sequence of logic low digital signals into the remaining ones of bit locations, whereby a moving vertical pattern of said impulses is generated within said array.

13. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional patter of said simulated electrophysiological impulses,

(d) loading a sequence of logic high digital signals into a first one of said latches, and loading a sequence of logic low level signals into remaining ones of said latches, and

(e) successively loading said sequence of logic high digital signals into successive ones of said latches, and loading said sequence of logic low digital signals into the remaining ones of said latches, whereby a moving horizontal pattern of said impulses is generated within said array.

14. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) arranging said latches into seven rows of eight bit locations each,

(e) loading a first one of said latches corresponding to the fourth one of said rows with a digital signal having a value of 04 hex,

(f) loading second and third ones of said latches corresponding to the third and fifth ones of said rows with a digital signal having a value of 03 hex,

(g) loading said first one of said latches with a digital signal having a value of 04 hex,

(h) loading fourth and fifth ones of said latches corresponding to the second and sixth ones of said rows with a digital signal having a value of 7E hex,

(i) loading said first, second and third latches with a digital signal having a value of 42 hex,

(j) loading sixth and seventh ones of said latches corresponding to the first and seventh ones of said rows with a digital signal having a value of FF hex, and

(k) loading said first, second, third, fourth and fifth latches with a digital signal having a value of 81 hex, whereby a moving square pattern of said impulses is generated within said array.

15. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) arranging said latches into seven rows of eight bit locations each, and

(e) successively loading progressively more significant bit locations of respective ones of said latches with a logic high digital signal, and loading a sequence of logic low digital signals into remaining ones of said bit locations, whereby a moving signal impulse pattern is generated across successive elements of said array.

16. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) arranging said latches into seven rows of eight bit locations each,

(e) loading first and second ones of said latches corresponding to the first and seventh ones of said rows with a digital signal having a value of 00 hex,

(f) loading a third one of said latches corresponding to the second one of said rows with a digital signal having a value of 26 hex,

(g) loading fourth, fifth and sixth ones of said latches corresponding to the third, fourth and fifth ones of said rows respectively with a digital signal having a value of 2A hex,

(h) loading a seventh one of said latches corresponding to the sixth one of said rows with a digital signal having a value of 66 hex,

(i) loading said first and second ones of said latches with a digital signal having a value of FF hex,

(j) loading said third one of said latches with a digital signal having a value of D9 hex,

(k) loading said fourth, fifth and sixth ones of said latches with a digital signal having a value of D5 hex, and

(l) loading said seventh one of said latches with a digital signal having a value of 99 hex, whereby a two-dimensional pattern of said impulses resembling the letters DL is generated within said array.

17. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) arranging said latches into seven rows of eight bit locations each,

(e) loading first, second, third and fourth ones of said latches corresponding to the first, third, fifth and seventh ones of said rows respectively with a digital signal having a value of 55 hex,

(f) loading fifth, sixth and seventh ones of said latches corresponding to the second, fourth and sixth ones of said rows respectively with a digital signal having a value of AA hex,

(g) loading said first, second, third and fourth ones of said latches with a digital signal having a value of AA hex, and

(h) loading said fifth, sixth and seventh latches with a digital signal having a value of 55 hex, whereby a moving checker board pattern of said impulses is generated within said array.

18. A method for generating a series of simulated electrophysiological impulses in two dimensions, comprising the steps of:

(a) generating one or more sequences of digital signals,

(b) loading said one or more sequences of digital signals into predetermined bit locations of a plurality of latches, said bit locations of respective ones of said latches being arranged to form a two-dimensional array,

(c) shaping said digital signals to resemble electrophysiological impulses, whereby said sequences of digital signals form a two-dimensional pattern of said simulated electrophysiological impulses,

(d) arranging said latches into seven rows of eight bit locations each,

(e) loading first, second, third, fourth, fifth and sixth ones of said latches corresponding to the first, second, third, fifth, sixth and seventh ones of said rows respectively with a digital signal having a value of 18 hex,

(f) loading a seventh one of said latches corresponding to the fourth one of said rows with a digital signal having a value of FF hex,

(g) loading said first, second, fifth and sixth latches with a digital signal having a value of 24 hex,

(h) loading said third and fourth latches with a digital signal having a value of E7 hex,

(i) loading said seventh latch with a digital signal having a value of 00 hex,

(j) loading said first and sixth ones of said latches with a digital signal having a value of 42 hex,

(k) loading said second and fifth ones of said latches with a digital signal having a value of C3 hex,

(l) loading said third, fourth and seventh ones of said latches with a digital signal having a value of 00 hex,

(m) loading said first and sixth ones of said latches with a digital signal having a value of 81 hex, and

(n) loading said second, third, fourth, fifth and seventh ones of said latches with a digital signal having a value of 00 hex, whereby a moving cross pattern of said impulses is generated within said array.