Semiconductor device having a vertical power MOSFET fabricated in an isolated form on a semiconductor substrate

• US 5,045,900 A
• Filed: 01/22/1991
• Issued: 09/03/1991
• Est. Priority Date: 10/27/1987
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Tamagawa, Akio
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): BOWERS, COURTNEY
• Application Number:
  US07/643,105
• Time in Patent Office: 224 Days
• Field of Search: 357/42, 357/48, 357/23.4, 357/52, 357/23.14, 357/41, 357/50
• US Class Current: 257/338
• CPC Class Codes: H01L 21/761 PN junctions
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate

Abstract

A semiconductor device includes an N-type semiconductor substrate, an N-channel type vertical MOSFET formed in the semiconductor substrate, a source electrode connected to a source region of the vertical MOSFET formed in the upper surface of the semiconductor substrate, a drain electrode of the vertical MOSFET formed on the bottom surface of the semiconductor substrate, a CMOS circuit formed in the upper surface of the semiconductor substrate to control the operation of the vertical MOSFET and a P-type diffused region formed between the vertical MOSFET and the CMOS circuit. The drain electrode is to be connected to a first power line, the source electrode being to be connected to a load connected to a second power line.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a high concentration layer of one conductivity type and a low concentration layer formed on said high concentration layer;

a first electrode formed on an upper surface of said low concentration layer;

a second electrode formed on a bottom surface of said high concentration layer;

a vertical MOSFET formed in said semiconductor substrate for switching a current flowing between said first electrode and said second electrode said vertical MOSFET having a source and a base, and said source and said base being electrically connected to said first electrode;

at least one circuit element formed in said low concentration layer within a first depth; and

a diffused region of the other conductivity type formed in said low concentration layer between said vertical MOSFET and said circuit element with a second depth deeper than said first depth, said diffused region being electrically connected to said first electrode.

2. A semiconductor device as claimed in claim 1, wherein said circuit element is a lateral MOSFET.

3. A semiconductor device as claimed in claim 2, wherein said circuit element forms a complementary MOS circuit.

4. A semiconductor device as claimed in claim 2, wherein said vertical MOSFET is an N-channel type vertical MOSFET, said one conductivity type being N-type and said the other conductivity type being P-type.

5. A semiconductor device as claimed in claim 4, wherein said second depth is from 5 to 20 μ

m.

6. A semiconductor device as claimed in claim 4, wherein said semiconductor substrate has said low concentration layer of a N-type in said upper surface thereof, said source of said N-channel type vertical MOSFET being N-type, said base of said N-channel type vertical MOSFET being P-type and being formed in said low concentration layer, a source and a drain of said lateral MOSFET being formed in said low concentration layer, and a depth xj of said second depth and a depth xe of said low concentration layer having a relation of xj/xe>

0.7.

7. A semiconductor device comprising:

a semiconductor substrate of one conductivity type having a front surface and a back surface, said semiconductor substrate having a high concentration portion with a bottom face forming said back surface and a low concentration portion formed on said high concentration portion with an upper face forming said front surface;

a first electrode formed on said front surface of said semiconductor substrate to be connected to a first power line of a first power voltage through a load;

a second electrode formed on said back surface of said semiconductor substrate to be connected to a second power line of a second power voltage;

a vertical MOSFET formed in said semiconductor substrate for switching a current flowing between said first electrode and said second electrode, said vertical MOSFET having a source and a base, said source and said base being electrically connected to said first electrode;

a control circuit formed in said low concentration portion for controlling said vertical MOSFET; and

a diffused region of the other conductivity type formed in said low concentration portion between said vertical MOSFET and said control circuit, said diffused region being disposed over said high concentration portion and having a depth deeper than that of said control circuit, and said diffused region being electrically connected to said first electrode.

8. A semiconductor device as claimed in claim 7, wherein said vertical MOSFET is an N-channel type vertical MOSFET, said one conductivity type being N-type, said the other conductivity type being P-type, said first power voltage being ground voltage and said second power voltage being positive voltage.

9. A semiconductor device as claimed in claim 8, wherein said control circuit is formed by using lateral MOSFET.

10. A semiconductor device as claimed in claim 9, wherein said depth of said diffused region is from 5 to 20 μ

m.

11. A semiconductor device as claimed in claim 9, wherein a depth xj of said depth of said diffused region and a depth xe of said low concentration portion have a relation of xj/xe>

0.7.