Interference cancellation circuit

• US 5,046,133 A
• Filed: 02/28/1989
• Issued: 09/03/1991
• Est. Priority Date: 02/29/1988
• Status: Expired due to Fees

• Current Assignee: Nippon Telegraph and Telephone Corporation
• Original Assignee: Nippon Telegraph and Telephone Corporation
• Inventors: Watanabe, Kazuzi, Matue, Hideaki, Ito, Masahiko
• Primary Examiner(s): KUNTZ, CURTIS A
• Application Number:
  US07/317,246
• Time in Patent Office: 917 Days
• Field of Search: 455/133-137, 455/272, 455/275, 455/277, 455/278, 455/295, 455/296, 455/249, 455/138, 455/139, 375/100, 375/101, 375/102
• US Class Current: 455/138
• CPC Class Codes: H04B 1/126 having multiple inputs, e.g. auxiliary antenna for receiving interfering signal aerials in general H01Q

Abstract

An interference cancellation circuit which can remove the interference signal caused by other systems and contained in received signals. The interference signal can be cancelled even if the interference signal is not directly obtained or plural interference signals exist, or the interference signal is a wide band signal or raster interference simply by receiving two signals which have passed through different transmission paths, combining the main signals contained in each of the received signals in a manner to offset each other to the extract interference signal, and removing the interference signal component from the received signal based on the expected interference signal.

Claims

1. An interference cancellation circuit comprising:

two receiver circuits which each respectively receive a signal, each received signal including a main signal component and an interference signal component;

a first adjustment means for adjusting a relative amplitude and phase of the received signals from respective outputs of the two receiver circuits;

a first combining means which combines adjusted received signals which have been adjusted in amplitude and phase by the first adjusting means;

first control means for controlling said first adjusting means in a manner to make the interference signal component contained in the output from the first combining means larger than the main signal component;

a second adjusting means for adjusting amplitude and phase of outputs of said first combining means;

a second combining means for combining outputs from the second adjusting means with at least one of said received signals; and

a second control means for controlling said second adjusting means in a manner to minimize the interference signal component in the output from said second combining means.

2. An interference cancellation circuit as claimed in claim 1 wherein the first adjusting means includes two automatic gain controllers, one provided at each output of the two receiver circuits;

a first variable phase shifter connected to one of the outputs of the two automatic gain controllers, and a first variable attenuator provided at the other output of the two automatic gain controllers or at the output of the first phase shifter, wherein the first controller includes phase difference detector means which detects a difference in-phase of the outputs from said two automatic gain controllers, a phase controller means which controls said first variable phase shifters with the output from the phase difference detector means, and an amplitude controller which controls said first variable attenuator with a control voltage of said two automatic gain controllers.

3. The interference cancellation circuit as claimed in either of claims 1 or 2 further comprising means for obtaining a local frequency reproduced from the output of the second combining means wherein the second adjusting means includes a second variable phase shifter and a second variable attenuator, and the second controller means includes a coherent quadrature phase detector which divides the output from the second combining means into an in-phase component and a quadrature phase component using said local frequency, two error signal detectors which receive the in-phase and quadrature phrase components from the coherent quadrature phase detector as inputs thereto, a phase detector which detects phases of the output signals from said second variable phase shifters based on said local frequency, correlation detectors which separately detect correlation between an output of the phase detector and said two error signal detectors separately, amplitude controllers which control said second variable attenuators using the correlation between same phase ones of said components from the correlation detector, and a phase controller means for controlling said second phase shifter based on the correlation of ones of the components which have phases which are perpendicular to one another.

4. The interference cancellation circuit as claimed in claim 3 wherein the correlation detector includes a plurality of interconnected exclusive OR gates and integrators.

5. The interference cancellation circuit as claimed in claim 1 further comprising means for obtaining a local frequency from the output of said second combining means and wherein the first control means includes divider means for dividing one of the received signals obtained at the outputs of the two receiver circuits, a first phase detector which phase-detects the divided signal using said local frequency, a second phase detector which phase-detects the output signal from said first combining means with said local frequency, a third phase detector which phase-detects at least one of the divided signals and the output signal from said first combining means with said local frequency and a carrier of quadrature phase, a first amplitude control means which controls the adjustment of amplitude at the first adjusting means with a correlation between the components of the same phase of the phase detection output of said branched signals and of the phase detection output of the signal from said first combining means, and a first phase control means which controls the adjustment of phase at the first adjusting means with correlation of the components of the same perpendicular to each other of the phase detection output of said branched signals and the detection output of the signal from said first combining phase means.

6. The interference cancellation circuit as claimed in claim 5 wherein the first adjusting means includes a first variable attenuator and a first phase shifter provided at either one of the inputs of the first combining means, the first amplitude control means includes a means for controlling said first variable attenuator, and the first phase control means includes means for controlling said first variable phase shifter.

7. The interference cancellation circuit as claimed in claim 5 wherein the first adjusting means includes a first transversal filter which is provided at either one of the inputs of the first combining means and has independently variable attenuations for in-phase components and quadrature phase components of an input signal, the first amplitude control means includes means for controlling attenuation of the in-phase components at said first transversal filter, and the first phase control means includes means for controlling attenuation of the quadrature phase component of said first transversal filter.

8. The interference cancellation circuit as claimed in any one of claims 1, 5, 6 and 7 wherein the second control means includes a quadrature phase detector which divides the output from the second combining means based on the local frequency reproduced from the output from the second combining means into an in-phase component and a quadrature phase component, two error signal detectors which receive as inputs the in-phase and quadrature phase components from the quadrature phase detector, a phase detector which phase-detects the output signal from said second variable phase shifter with said local frequency, a second amplitude control means which controls the adjustment of amplitude at the second adjusting means using the correlation of the components of the same phase of the output from the phase detector and of the output from said two error signal detectors, and second phase control means which controls adjustment in-phase at said second adjusting means with the correlation of the components of phases perpendicular to each other of the output from the phase detector and the outputs from said two error signal detectors.

9. The interference cancellation circuit as claimed in claim 8 wherein the second adjusting means includes a second variable attenuator and a second variable phase shifter, and the second amplitude control means includes means for controlling said second variable phase shifter.

10. The interference cancellation circuit as claimed in claim 8 wherein the second adjusting means includes a quadrature amplitude modulator provided with two variable attenuators which can separately vary weights provided to the in-phase component and the quadrature phase component of an input signal, and the second amplitude control means includes a means to control the variable attenuator on the in-phase side of said quadrature amplitude modulator.

11. The interference cancellation circuit as claimed in claim 8 wherein the second adjusting means includes a second transversal filter which can independently vary attenuation of an in-phase component and a quadrature phase component of an input signal, the second amplitude control means includes means for control of attenuation of the in-phase component at said second transversal filter, and the second phase control means includes means for controlling the attenuation of the quadrature phase at said second transversal filter.

12. The interference cancellation circuit as claimed in claim 1 which further comprises:

means for extracting a local frequency from the main signal component;

a first quadrature phase detector which divides at least one of the received signals at the two receiver circuits into an in-phase component and a quadrature phase component based on the local frequency;

a second and a third quadrature phase detectors which divide the received signals at said two receiver circuits based on said local frequency;

wherein the first adjusting means includes first and third bipolar attenuators which receive as inputs quadrature component outputs from said third quadrature phase detector, and second and fourth bipolar attenuators which receive as inputs the in-phase component output from said third quadrature phase detector;

combining means includes first and second adders which add the outputs from said first and second bipolar attenuators respectively to the in-phase component outputs from said second quadrature phase detector, and third and fourth adders which add outputs of said third and fourth bipolar attenuators respectively to the quadrature component output from said second quadrature phase detector, the second adjusting means includes fifth and seventh bipolar attenuators which receive as inputs the quadrature component output from said second quadrature phase detector, and sixth and eighth bipolar attenuators which receive as inputs the in-phase component output from said second quadrature phase detector, the second combining means and fifth and sixth adders which add the outputs from said fifth and sixth bipolar attenuators respectively to the in-phase component output from said first quadrature phase detector, and seventh and eighth adders which add the outputs from said seventh and eighth bipolar attenuators respectively to the quadrature component output from said quadrature phase detector,

wherein the first control means includes a first bipolar attenuator controller which controls the first through fourth bipolar attenuators with the signals obtained from said first and second adders, the signals obtained from said third and fourth adders and the output signal from said third quadrature phase detector, and

the second control means includes a second bipolar attenuator controller which controls said fifth through eighth bipolar attenuators with the signals obtained from said fifth and sixth adders, the signal obtained from said seventh and eighth adders and the output signal from said second quadrature phase detector.

13. The interference cancellation circuit as claimed in claim 12 wherein the first through third quadrature phase detectors include analog to digital converters at each of the outputs thereof, and the first through eighth bipolar attenuators, the first through eighth adders, the first bipolar attenuator controller and the second bipolar attenuator controller comprise digital circuits.

14. The interference cancellation circuit as claimed in claim 13 wherein the first through eighth bipolar attenuators include transversal filters.

15. The interference cancellation circuit as claimed in claim 13 wherein the first through eighth adders are full-adders.

16. An interference cancellation circuit comprising:

two receiver circuits which each respectively receive a signal including a main signal component and an interference signal component;

a first adjusting means which adjusts relative amplitude and phase of the received signals at outputs of the two receiver circuits;

a first combining means for combining the two received signals which have been amplitude and phase adjusted by the first adjusting means;

a first control means for controlling said adjustment by said first adjusting means to make the interference signal component included within the output from the first combining means higher in level than the main signal component;

third adjusting means for adjusting the relative amplitude and phase of the received signals obtained in the outputs of said two receiver circuits and which is provided separately from said first adjusting means;

third combining means for combining the two received signals after they have been adjusted in amplitude and phase by the third adjusting means; and

third control means which controls said third adjusting means to minimize the interference signal component included within the output from the third combining means.