Closeness code and method

• US 5,053,974 A
• Filed: 12/04/1990
• Issued: 10/01/1991
• Est. Priority Date: 03/31/1987
• Status: Expired due to Fees

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Texas Instruments, Inc.
• Inventors: Penz, Perry A.
• Primary Examiner(s): MacDonald, Allen R.
• Application Number:
  US07/624,481
• Time in Patent Office: 301 Days
• Field of Search: 364/513, 382/14, 382/15
• US Class Current: 706/18
• CPC Class Codes: G06N 3/04 Architecture, e.g. interconnection topology

Abstract

Preferred embodiments include encoders and encoding methods for encoding integers as sparse binary vectors as used in neural networks. The encoding is by position of nonzero components; such as for N component vectors, the integer n is represented by a sequence of n components equal to zero followed by a sequence of log₂ N components equal to one and then a sequence of N-n-log₂ N components equal to zero. Other preferred embodiments include permutations of vector components while retaining the same number of nonzero components and also with partitioning into more and less significant subvectors.

Claims

1. A information processing system comprising:

circuitry for providing a sequence of information signals;

an encoder which receives said sequence at an input of said encoder and comprises circuitry for processing a plurality of series of two state electrical signals representative of code vectors, each code vector corresponding to one of said information signals, wherein each code vector comprises circuitry for processing a fixed number of electrical component signals, wherein said circuitry is programmed such that a portion of said component signals are assigned to one of said two states and the remaining signals are assigned to the other of said two states, and wherein for any two information signals, the Hamming distance between said corresponding code vectors is within a selected closeness no greater than twice said fixed number if said two information signals are within said selected closeness; and

a neural network connected to an output of said encoder, said neural network comprising a fixed number of inputs equal to said fixed number of electrical component signals wherein said circuitry for processing each of said electrical signal components is connected such that each neural network input corresponds to one of said electrical signal components.

2. The computation system of claim 1, wherein said circuitry for processing said two state electrical signal components representing said code vector signals comprises circuitry operable for:

arbitrarily assigning said portion of said signal components of the output code vector corresponding to the first information signal to a selected one of the two given states, and assigning the remaining signal components to the other state;

for each of the remaining output code vectors, assigning said portion of signal components to said selected state such that the Hamming distance between any two output code vectors corresponds with the distance between any two information signals within said closeness.

3. The computation system of claim 2, and wherein

said circuitry for providing a sequence of information signal further comprises circuitry for partitioning each information signal into at least two parts prior to generation of said code vector signals.

4. The computation system of claim 1, wherein said circuitry for processing a fixed number of electrical component signals is programmed such that said portion of signal components is equal to the base two log of said fixed number of electrical components.

5. The computation system of claim 1, wherein said circuitry for providing a sequence of information signals comprises circuitry for providing a sequence of information signals which represent integer numbers.

6. The computation system of claim 1, wherein said encoder comprises circuitry for processing a lookup table.

7. The computation system of claim 1, wherein said encoder comprises logic gates.

8. The computation system of claim 1 wherein said circuitry comprises:

circuitry for viewing a physical image and creating an electrical signal with characteristics corresponding to the physical image;

an analog-to-digital converter connected at the output of the means for viewing the physical image;

circuitry for performing a Fast Fourier Transform, wherein the input is connected to the output of the analog-to-digital converter and the output is connected to the input of the encoder.

9. The computation system of claim 8 wherein said circuitry for viewing comprises a television camera.

10. The computation system of claim 1 and further comprising means for displaying at the outputs of the neural network.

11. A method of processing information comprising:

providing a sequence of information signals;

receiving said sequence of information signals at an input of an encoder;

generating a plurality of series of two state electrical signals representative of code vectors in said encoder;

assigning a fixed number of said electrical signals to one of said two states and assigning the remaining electrical signals to the other of said two states;

assigning each of said information signals to a corresponding one of said series of two state electrical signals such that the Hamming distance between any two of said information signals is within a selected closeness no greater than twice said fixed number if the two corresponding information signals are within said selected closeness;

providing said two state electrical signals to an input of a neural network; and

processing said two state electrical signals within said neural network.

12. The method of claim 11, wherein said generating step comprises generating the state of hardware logic gates.

13. The method of claim 11, wherein said step of providing a set of information signals comprises:

viewing a physical image and creating an electrical signal with characteristics corresponding to the physical image;

digitizing said electrical signal in an analog-to-digital converter; and

performing a Fast Fourier Transform on said digitized electrical signal.

14. The method of claim 13, wherein said step of viewing a physical image comprises viewing a physical image through a television camera.

15. The method of claim 11, wherein said step of providing a set of information signals comprises providing sensor information and said step of processing said electrical signals within said neural network comprises classifying said sensor information.

16. The method of claim 11, wherein said step of processing said two state electrical signals comprises the step of processing said two state electrical signals with an unequal weight assigned to each signal.