Integrated circuit package with battery housing
First Claim
1. A nonvolatile memory, comprising:
- a volatile integrated circuit memory;
a battery;
a housing encapsulating and in contact with said volatile integrated circuit memory, said housing providing at least partial containment for said battery;
a leadframe having a portion thereof enclosed within said housing, said leadframe having leads thereof extending from said housing for forming a set of dual in-line pins which receive primary power for supply to said volatile integrated circuit memory; and
a switchover circuit positioned within said housing, said switchover circuit electrically connected to said battery and said volatile integrated circuit memory to provide power from said battery to said volatile integrated circuit memory when said primary power is not provided through said dual in-line pins to said volatile integrated circuit memory.
2 Assignments
0 Petitions
Accused Products
Abstract
An integrated circuit, typically a random access memory, is housed in a package (14). In the application associated with the integrated circuit it is desired to maintain the data states stored in the memory even when the normal supply voltage is disconnected from the package (14). Batteries (24, 26) are secured in recesses (20, 22) within a structure (12) which is connected to the integrated circuit package (14). A top spring clip (100) is provided to securely hold the batteries (24, 26) within the recesses (20, 22) and forms a common conductor in contact with the upper terminal of both batteries. A bottom spring clip (74, 76) is provided for each of the recesses (20, 22) to form separate conductors in contact with the lower terminal of each battery. The batteries can be readily inserted and removed over lips (64, 70) in the recess (20, 22).
79 Citations
16 Claims
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1. A nonvolatile memory, comprising:
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a volatile integrated circuit memory; a battery; a housing encapsulating and in contact with said volatile integrated circuit memory, said housing providing at least partial containment for said battery; a leadframe having a portion thereof enclosed within said housing, said leadframe having leads thereof extending from said housing for forming a set of dual in-line pins which receive primary power for supply to said volatile integrated circuit memory; and a switchover circuit positioned within said housing, said switchover circuit electrically connected to said battery and said volatile integrated circuit memory to provide power from said battery to said volatile integrated circuit memory when said primary power is not provided through said dual in-line pins to said volatile integrated circuit memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A nonvolatile memory, comprising:
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a volatile integrated circuit memory; a battery; a housing encapsulating and in contact with said volatile integrated circuit memory, said housing providing containment for said battery; a leadframe having a portion thereof enclosed within said housing, said leadframe having leads thereof extending from said housing for forming a set of dual in-line pins which receive primary power for supply to said volatile integrated circuit memory; said battery having a disc shape and positioned in a plane offset from the plane of said volatile integrated circuit memory; and a switchover circuit positioned within said housing, said switchover circuit electrically connected to said battery and said volatile integrated circuit memory to provide power from said battery to said volatile integrated circuit memory when said primary power is not provided through said dual in-line pins to said volatile integrated circuit memory. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A dual-in-line nonvolatile memory package, comprising:
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at least one battery; an integrated circuit memory chip adapted for storing data in a volatile manner, said chip having leads extending therefrom for providing power and signal access to memory circuits of said chip; a leadframe having inner terminal ends converging to a central area, the leads of said chip being connected to the inner ends of said leadframe, said leadframe having outer terminal ends which are formable into a dual-in-line configuration; a switchover circuit responsive to the absence of external power coupled to said memory package for coupling power from said battery to the nonvolatile memory circuits; an encapsulant formed around and in contact with said memory chip and the inner terminals of said leadframe so as to provide a hermetic seal to said memory chip and said leadframe extending from said encapsulant, said encapsulant having a cavity for holding said batteries and for supporting battery conductors which contact said battery, said battery conductors being electrically connected to said memory chip via said leadframe. - View Dependent Claims (16)
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Specification