Method for the control of an electro-optical matrix screen and control circuit

• US 5,055,833 A
• Filed: 08/15/1988
• Issued: 10/08/1991
• Est. Priority Date: 10/17/1986
• Status: Expired due to Term

• Current Assignee: Thomson Grand Public
• Original Assignee: Thomson Grand Public
• Inventors: Hehlen, deceased, Robert, Hehlen, legal representative, by Philippe, Le Galguen, Maurice, Hehlen, legal representative, by Bernard, Mourey, Bruno
• Primary Examiner(s): Weldon, Ulysses
• Assistant Examiner(s): FATAHI YAR, MAHMOUD
• Application Number:
  US07/232,644
• Time in Patent Office: 1,149 Days
• Field of Search: 340/784, 340/805, 340/765, 340/811, 350/333, 358/241
• US Class Current: 345/94
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general

Abstract

A control method and control circuit for an electro-optic matrix screen wherein: a) during a frame time period, and during the control of certain lines, the screen is controlled by voltages of a determined polarity; b) during the same frame time period, and during the control of the other lines, the screen is controlled by voltages of reverse polarity; and c) during the following frame time period, the control voltages is reversed. An inverter control circuit C.INV enables the inversion of the voltages given by input circuits INV, IN, ADD.C to the column electrodes, and by an addressing circuit ADD.C to the line electrodes. The invention can be applied to the control of liquid crystal display panels to eliminate display faults.

Claims

1. A control circuit of an electro-optical screen implementing a method for the control of an electro-optical matrix screen comprising several cells arranged in lines and columns, each cell being provided with a line control electrode and a column control electrode providing for the application, to the control electrodes of each cell, of at least one first control voltage with a first determined sign and at least one second control voltage with a second sign opposite the first one, said method having frame time periods with line time intervals, characterized in that:

first and second lines of the cells being controlled during the line time intervals, during a determined frame period and during the first line time intervals the lines of cells are controlled by said first control voltage and, during the second line time intervals the lines of the cells are controlled by said second control voltage;

during the following frame period and during the first line time intervals the lines of cells are controlled by the second control voltage while, during the second line time intervals the lines are controlled by said first control voltage comprising;

a liquid crystal display panel comprising said screen and having said cells arranged in lines and columns, each cell being controlled by said line control electrode and column control electrode, with the screen comprising a determined number N of said lines;

said circuit further comprising, power supply circuits for giving said first control voltage of said first determined sign and said second control voltage of said second sign opposite to that of the first sign;

an inverter circuit for applying to said line and column electrodes, either the first control voltage or the second control voltage;

a line period clock determining a control period of each line; and

providing a line period clock signal to the inverter;

a frame frequency signal generator determining a display period of a frame and providing a frame frequency signal;

characterized in that said control circuit further comprises;

a generator of random codes, which are all different and equal in number to the number N of lines, connected to the inverter circuit and enabling, depending on the value of each code, the control of the inverter circuit so that it applies, at each line to be controlled, during each line period, and controlled by the line period clock signal, either the first control voltage or the second control voltage;

a first frequency divider-by-two circuit for receiving the frame frequency signal and giving a control signal, during one frame time period in two, to the inverter circuit for inverting the functioning of the inverter circuit.

2. A control circuit according to claim 1 characterized in that the random codes generator comprises:

a shift register (RD) comprising as many outputs as needed to give a number (N) of codes equal to the number (N) of lines;

a combinational logic circuit connected to the outputs of this register detecting certain values of determined codes and giving a binary signal 0 or 1 which is reinjected into a shift input of the register and which is given to the inverter circuit to control, depending on the binary value of the signal, the supply of either the first control voltage or the second control voltage.

3. A control circuit according to claim 2 characterized in that it comprises an exclusive-OR logic gate with two inputs receiving said binary signal at one input and said control signal at the other input, and giving, at an output, an inversion control signal to the inverter circuit, of which the various successive signals, given during a frame, time period are inverted with respect to the same sequences of a neighboring frame time period.

4. A control circuit according to claim 2 characterized in that the combinational logic circuit is an exclusive-OR gate comprising a number of inputs connected to two outputs of the shift register (RD).

5. A control circuit according to claim 4 characterized in that the exclusive-OR gate comprises two inputs connected to two outputs of the shift register.

6. A control circuit according to claim 1 further comprising:

a binary counter having as many outputs as the shift register has stages and having said outputs connected to inputs of the shift register;

a load control register connected to the first frequency divider, receiving the switch-over signal and controlling, at each transition of the switch-over signal, loading of the content of the binary counter in the shift register; and

a second frequency divider-by-two circuit for receiving said switch-over signal and giving a feed signal to the binary counter.