Multiple processor system having a correspondence table for transferring processing control between instruction processors

• US 5,062,046 A
• Filed: 03/20/1990
• Issued: 10/29/1991
• Est. Priority Date: 03/20/1989
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Takahashi, Shigekatsu, Iwasaki, Masaaki, Sumiyoshi, Takashi, Yamamoto, Shoji, Negishi, Kazuyoshi
• Primary Examiner(s): Fleming, Michael R.
• Assistant Examiner(s): Bodendorf, Andrew F.
• Application Number:
  US07/496,327
• Time in Patent Office: 588 Days
• Field of Search: 364/200, 364/900
• US Class Current: 710/240
• CPC Class Codes: G06F 9/468 Specific access rights for resources, e.g. using capability register
• CPC Class Codes: G06F 9/5011 the resources being hardware resources other than CPUs, Servers and Terminals

Abstract

A multiple processor system composed of a plurality of instruction processors allows a plurality of its subsystems for performing data processing in each unit to be operable simultaneously with and parallel to each other in each of the instruction processors. The multiple processor system has a processor designation table and a control processing subsystem. As the processor designation table specifies correspondence relation between a subsystem accessing to each input-output resource and the instruction processor executing the subsystem, the processing control subsystem transfers control of the processing to the instruction processor to be designated by the processor designation table in accordance with the subsystem to be used with reference to the processor designation table during execution of the data processing.

Claims

1. A multiple processor system, comprising:

a plurality of input/output resources;

a plurality of instructions processors connected to said input/output resources, each instruction processor having at least one processing subsystem which performs a predetermined processing simultaneously with and in parallel to processing by other processing subsystems, each processing subsystem being assigned to access at least one input/output resource;

means providing a processor correspondence table for indicating a correspondence between each processing subsystem and an instruction processor having said processing subsystem; and

control processing means, coupled to said plurality of instruction processors and responsive to a request from one instruction processor for a particular processing subsystem to access an input/output resource assigned to that particular processing subsystem, for accessing said processor correspondence table and for transferring processing control from said one instruction processor to another instruction processor corresponding to said input/output resource as indicated by said processor correspondence table.

2. A multiple processor system as claimed in claim 1, wherein each processing subsystem is assigned to only one input/output resource, and wherein said control processing means includes means providing a subsystem correspondence table for indicating a correspondence between each processing subsystem and an input/output resource.

3. A multiple processor system as claimed in claim 1, wherein said input/output resources include terminal equipment and a data base file in an on-line data base system.

4. A multiple processor system as claimed in claim 3, wherein each instruction processor is connected to both a terminal equipment and a data base file and includes at least a pair of processing subsystems.

5. A multiple processor system as claimed in claim 4, wherein each processing subsystem is assigned to only one input/output resource.

6. A multiple processor system as claimed in claim 1, wherein said control processing means comprises an instruction processor having a common subsystem for controlling the processing control of other instruction processors on the basis of information provided in said processor correspondence table.

7. A method of data processing in a multiple processor system having a plurality of input/output resources and a plurality of instruction processors connected to said input/output resources for performing a processing including a plurality of unit processes which may be executed simultaneously and in parallel to each other, comprising the steps of:

providing in each instruction processor at least one processing subsystem for performing a predetermined unit process to access at least one input/output resource;

specifying in a processor correspondence table a correspondence between each processing subsystem and an instruction processor having said processing subsystem; and

transferring processing control from one instruction processor, which produces a request for a particular processing subsystem to access an input/output resource assigned to that subsystem, to another instruction processor corresponding to said input/output resource, as indicated by said processor correspondence table.

8. A method as claimed in claim 7, wherein each processing subsystem is provided to access only one input/output resource, and further comprising providing a subsystem correspondence table for indicating a correspondence between each processing subsystem and an input/output resource.