Method for the manufacture of electrical membrane panels having circuits on flexible plastic films

• US 5,062,916 A
• Filed: 08/01/1990
• Issued: 11/05/1991
• Est. Priority Date: 08/01/1990
• Status: Expired due to Term

• Current Assignee: 3M Innovative Properties Company (3M Company)
• Original Assignee: W H Brady Company
• Inventors: Kelley, Wayne R., Aufderheide, Brian E., Robrecht, Michael J.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US07/561,027
• Time in Patent Office: 461 Days
• Field of Search: 156/247, 156/250, 156/269, 156/270, 156/277, 156/289, 156/324, 156/634, 156/902, 29/846, 174/68.1, 428/209, 428/901, 427/96
• US Class Current: 156/269
• CPC Class Codes: G06F 2203/04102 Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
• CPC Class Codes: G06F 2203/04103 Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
• CPC Class Codes: H05K 1/0289 having a matrix lay-out, i.e. having selectively interconnectable sets of X-conductors and Y-conductors in different planes
• CPC Class Codes: H05K 1/0393 Flexible materials H05K1/038 takes precedence; specific organic compositions are classified in H05K1/0313 and subgroups
• CPC Class Codes: H05K 1/144 Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 2203/1545 Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
• CPC Class Codes: H05K 3/0008 for aligning or positioning of tools relative to the circuit board H05K3/4638, H05K3/4679 take precedence; for manufacturing assemblages of components H05K13/0015
• CPC Class Codes: H05K 3/0097 Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards H05K3/0052 takes precedence
• CPC Class Codes: Y10S 428/901 Printed circuit
• CPC Class Codes: Y10T 156/1084 of continuous or running length bonded web
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 428/24917 including metal layer

Abstract

A method for producing electrical membrane panels including spaced conductive circuits on separate plastic film layers in which the membrane panels are formed on webs of the plastic films laminated together, and individual membrane panels are severed from the combined webs after being formed thereon.

Claims

1. A method for manufacturing electrical membrane panels including conductive first and second circuits on spaced surfaces of two plastic films including, in sequence, the steps of:

(1) providing a substrate web of flexible plastic film;

(2) defining a plurality of registration means longitudinally along the substrate web, there being a registration means for each row of circuits to be applied onto the web in subsequent steps;

(3) applying a plurality of spaced apart conductive first circuits along a first surface of the substrate web by aligning with the registration means during application thereof,

(a) the first circuits being arranged in rows and columns along the first surface of the substrate web, with at least one column thereof and at least one first circuit in each row,

(b) each first circuit comprising a plurality of conductive first traces and first leads, and each first lead including a connection end portion;

(4) laminating a second web of flexible plastic film to the substrate web by aligning a longitudinal edge of the second web relative to the first circuits to cover the first circuits except for the connection end portions of each first lead;

(5) applying a plurality of spaced apart conductive second circuits along the first surface of the second web by aligning with the registration means during application thereof,

(a) there being a second circuit registered with each first circuit;

(b) each second circuit comprising a plurality of conductive second traces arranged in selected registration with the first traces of a first circuit, and a plurality of second leads each including a connection end portion;

thereby forming a plurality of membrane panels each including a first circuit and a second circuit with the connection end portions of the first leads exposed along the substrate web and the connection end portions of the second leads exposed along the second web.

3. A method according to claim 1 or 2 further including:

a penultimate step of applying a covering layer over the second web arranged to cover the second circuits except for the connection end portions of the second leads thereof; and

severing individual membrane panels from the composite product resulting upon completion of the penultimate step.

4. A method according to claim 1 or 2 wherein:

step (1) comprises providing a substrate web including a layer of adhesive along a second surface opposite from its first surface and a release liner over the adhesive.

5. A method according to claim 1 or 2 wherein:

step (1) comprises providing a substrate web and a carrier web joined to a second surface of the substrate web opposite from its first surface.

6. A method according to claim 1 or 2 wherein:

two columns of first circuits and second circuits are formed along the substrate and second web to provide rows of membrane panels with two panels in each row.

7. A method according to claim 1 or 2 wherein:

three columns of first circuits are formed along the substrate, a second web is laminated to the substrate web to cover two columns of first circuits, another second web is laminated to the substrate web to cover one column of first circuits, and three columns of second circuits are applied onto the second webs to provide rows of membrane panels with three panels in each row.

8. A method according to claim 1 or 2 wherein:

the first traces of each first circuit and the second traces of each second circuit of a membrane panel are arranged orthogonally to each other.

2. A method for manufacturing electrical membrane panels including conductive first and second circuits on spaced surfaces of two plastic films including, in sequence, the steps of:

(1) providing a substrate web of flexible plastic film;

(2) defining a plurality of registration means longitudinally along the substrate web, there being a registration means for each row of circuits to be applied onto the web in subsequent steps;

(3) forming first components of a plurality of spaced apart conductive first circuits by applying conductive first traces along a first surface of the substrate web by aligning with the registration means during application of the first traces,

there being a group of first traces for each first circuit arranged in rows and columns along the first surface of the substrate web, with at least one column thereof and at least one in each row;

(4) applying a first dielectric coating onto the first surface of the substrate web over portions of the first traces of each first circuit by aligning with the registration means during application thereof, there being a first dielectric coating for each first circuit including an aperture over each first trace thereof;

(5) forming second components of the first circuits by applying a plurality of conductive first leads onto each first dielectric coating by aligning with the registration means during application thereof, whereby each first trace of each first circuit is in electrical contact with at least one first lead within an aperture of the first dielectric coating for said circuit,

each first lead including a connection end portion exposed on the first surface of the substrate web adjacent its respective first dielectric coating;

(6) laminating a second web of flexible plastic film to the substrate web by aligning the second web relative to the first circuits and laminating it to the substrate web to cover the first circuits thereon except for the connection end portions of each first lead;

(7) forming first components of a plurality of spaced apart conductive second circuits by applying conductive second traces along a first surface of the second web by aligning with the registration means during application of the second traces,

(a) the second circuits each including a plurality of conductive second traces arranged in selected registration with the first traces of the first circuits, and

(b) there being a second circuit registered with each first circuit;

(8) applying a second dielectric coating onto the first surface of the second web over portions of the second traces of each second circuit by aligning with the registration means during application thereof, each second dielectric coating including an aperture over each second trace;

(9) forming second components of the second circuits by applying a plurality of conductive second leads onto each second dielectric coating by aligning with the registration means during application thereof, whereby each second trace of each second circuit is in electrical contact with at least one second lead within an aperture in the second dielectric coating,

each second lead including a connection end portion exposed on the first surface of the second web adjacent its respective second dielectric coating;

thereby forming a plurality of membrane panels, each including a first circuit and a second circuit with the connection end portions of the first leads exposed along the substrate web and the connection end portions of the second leads exposed along the second web.