×

Radar warning receiver compressed memory histogrammer

  • US 5,063,385 A
  • Filed: 04/12/1991
  • Issued: 11/05/1991
  • Est. Priority Date: 04/12/1991
  • Status: Expired due to Fees
First Claim
Patent Images

1. A method for preserving radar warning receiver generated pulse descriptor words for subsequent histogram organized processing comprising the steps of:

  • initializing each location of a frequency characterizing pulse descriptor word portion first memory and a time difference of arrival second memory to flag bit active predetermined initial condition;

    storing, in a location of said first memory accessed by the frequency characterizing portion of an arriving pulse descriptor word from said receiver, the current contents of a first counter circuit;

    remembering the time of arrival of said pulse descriptor word in a last time of arrival third memory;

    incrementing the contents of said first counter circuit by one count;

    computing the time difference of arrival value between each new pulse descriptor word arriving from said receiver and the remembered time of arrival stored in said third memory;

    said storing, remembering, and computing steps being inhibited and said computing step enabled, however, by prior deactivation of said flag bit in said first memory accessed location;

    addressing a location in said time difference of arrival second memory with said computed time difference of arrival value;

    testing said addressed second memory location for presence for said second memory predetermined initial flag bit active condition therein;

    setting the contents of said addressed second memory location to the present contents of a second counter circuit;

    indexing the contents of said second counter circuit by one count;

    said setting and indexing step being inhibited, however, by prior deactivation of said flag bit in said addressed second memory location;

    accessing a histogram organized fourth memory location by the combined stored data from said first and second;

    testing said accessed fourth memory location for an initial volume of zero;

    incrementing said accessed fourth memory location by one;

    if initial state of said accessed fourth memory location prior to incrementing is zero;

    recording in an active pixel fifth memory, in the first available location therein, the address parameters and the most recently stored values from said frequency characterization first memory and said time difference of arrival second memory;

    whereby active only pixel storage and reduced memory size requirements for said active pixel fifth memory are achieved.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×