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Smart power driver system for a motor vehicle

  • US 5,063,516 A
  • Filed: 08/21/1989
  • Issued: 11/05/1991
  • Est. Priority Date: 08/21/1989
  • Status: Expired due to Term
First Claim
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1. An apparatus for determining fault operation in systems which couple electrical power to actuators within a motor vehicle, comprising:

  • power driver means mounted on a module having a signal input pin, a status output pin, and a status input pin, said power driver means including switching means responsive to application of electrical energy to said signal input pin for the coupling of electrical power to the actuator, said power driver means including monitoring means for monitoring a plurality of electrical operating parameters of said switching means and for providing a corresponding plurality of fault type indications to said status output pin in response to application of a first sampling signal to said status input pin, said monitoring means also including feedback means for providing a proportion of the coupled electrical power to said status output pin in response to application of a second sampling signal to said status input pin;

    performing monitoring means for periodically sampling said plurality of fault type indications from said status output pin upon applying said first sampling signal to said status input pin during vehicular operation and providing corresponding output indications; and

    self test means for generating a self test mode upon initial vehicle key on and providing said second sampling signal to said status input pin, said self test means providing an electrical self test signal to said signal input pin for a predetermined time insufficient to actuate the actuator during said self test mode, said self test means storing electrical power occurring at said status output pin during said predetermined time in a first storage location and storing electrical power occurring at said status output pin after said predetermined time in a second memory location, said self test means subsequently providing an exclusive nor comparison of said first memory location to second memory location to provide a self test fault indication and providing a corresponding self test output indication.

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