Fast-learning neural network system for adaptive pattern recognition apparatus

• US 5,063,601 A
• Filed: 09/02/1988
• Issued: 11/05/1991
• Est. Priority Date: 09/02/1988
• Status: Expired due to Fees

• Current Assignee: John Hayduk
• Original Assignee: John Hayduk
• Inventors: Hayduk, John
• Primary Examiner(s): Razavi, Michael
• Application Number:
  US07/240,746
• Time in Patent Office: 1,159 Days
• Field of Search: 382/14, 382/15, 382/50, 382/27, 382/36, 364/274.9
• US Class Current: 706/39
• CPC Class Codes: G06F 18/2135 based on approximation criteria, e.g. principal component analysis
• CPC Class Codes: G06N 3/063 using electronic means
• CPC Class Codes: G06N 3/065 Analogue means

Abstract

A neural network for an adaptive pattern recognition apparatus includes a plurality of comparators coupled to an input signal. Each comparators compares the input to a different offset voltage. The comparator output is fed to scaling multipliers and then summed to generate an output. The scaling multipliers receive weighing factors generated by using a specific equation selected to insure a fat-learning neural network.

Claims

1. A neural network system comprising:

a recall circuit including input means and output means and a plurality of parallel comparator circuits connected to said input means, each said comparator including a summing circuit for summing an input signal from said input means with an offset voltage, a threshold detector coupled to said summing circuit for detecting when the summer output is within a preselected range and a multiplier for multiplies the threshold circuit output by a weight "wherein said threshold circuit generates a threshold output which equals to the summer output and other wise equals to one of high and low threshold level".

a series resistor circuit for generating said offset voltages; and

a feedback circuit including a plurality of function blocks, each function block being coupled to one of said comparator circuits for operating on a comparator signal from one said comparator circuit in accordance with a preselected function, said feedback circuit generating said weights for said multiplies;

wherein said feedback circuit has feedback input means for receiving a learning signal and connected to said input means and output means for an output signal, said feedback circuit recursively calculating said weights in the presence of said learning signal by changing said weights until said output signal equals a reference signal said feedback input circuit includes feedback summer for receiving said output signal and said reference signal, said feedback input circuit includes feedback summer for receiving said output signal and said reference signal, said feedback summer generating an error signal equal to the difference between said output and said reference signals, and feedback multipliers for multiplying the outputs of said function blocks with said error signal in the presence of said learn signal, said function block operates on each said comparator signal in accordance with the equation;

space="preserve" listing-type="equation">F.sub.u (V.sub.dk)=η

SGN(V.sub.dk)e.sup.-P/dlVdkl

where 0<

η

≦

1 is called the learning constant, SGN is the signum function and returns the signal of the argument, K ranges from 1 to n. and P is a shape constant which governs the shape of the response.