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Video RAM double buffer select control

  • US 5,065,368 A
  • Filed: 05/16/1989
  • Issued: 11/12/1991
  • Est. Priority Date: 05/16/1989
  • Status: Expired due to Term
First Claim
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1. A dual-port memory comprising:

  • a memory array having a plurality of memory elements each of which is accesses at random by a row and column address input to enable writing in or reading out of data at said row and column location;

    first and second serial access memory means, each selectively accessing a specified portion of the data of a row of said memory elements in parallel;

    control means for serially transferring data between said first and second serial access memory means and an output port in synchronism with a clock signal; and

    selection means for selectively actuating said control means to couple said first or secod serial access memory means to said output port, said selection means being responsive to a selection control signal which may be varied arbitrarily between successive cycles of said clock signal to select a particular one of said serial access memory means.

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