Secure mode answering machine

• US 5,065,428 A
• Filed: 05/29/1990
• Issued: 11/12/1991
• Est. Priority Date: 05/29/1990
• Status: Expired due to Fees

• Current Assignee: General Dynamics Decision Systems, Inc. (General Dynamics Corporation)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Mitchell, Michael L., Hawkins, George
• Primary Examiner(s): Tarcza, Thomas H.
• Assistant Examiner(s): SWANN, TOD R
• Application Number:
  US07/529,800
• Time in Patent Office: 532 Days
• Field of Search: 380/9, 380/23, 380/50, 379/95, 379/77, 379/88, 379/89, 379/90, 379/67
• US Class Current: 713/194
• CPC Class Codes: H04M 1/6505 storing speech in digital form

Abstract

A secure answering machine allows both secure and non-secure information to be recorded by incorporating a digital signal processor (DSP) and both a secure and non-secure RAM. The secure RAM is powered entirely by battery. The battery is then connected to the housing of the answering machine such that when the housing is tampered with, the power from the battery is shut off eliminating all information stored on the secure RAM. The secure RAM is only accessed using an encrypting code.

Claims

1. A device for receiving and storing information, such as telecommunication messages or transmitted data, for subsequent play-back, the device also transmitting information, such as telecommunication messages or transmitted data, the device comprising:

first means for receiving incoming information and transmitting information;

second means for determining when the information received or transmitted is secure or unsecured, said second means coupled to said first means;

third means coupled to said second means;

said third means for processing information received into and transmitted from the device;

an encoder/decoder coupled to said second and third means, said encoder/decoder receiving information which is secure and decoding the information when the device is receiving information, and encoding the information when the device is transmitting information;

said second means relaying received information to said encoder/decoder when said received information is secure, and receiving information from said encoder/decoder when information to be transmitted is secure;

said third means receiving information from said encoder/decoder when said information is secure, and relaying secure information to said encoder/decoder;

a plurality of RAMs (random access memory) coupled to said third means;

a first of said plurality of RAMs storing unsecured messages received from said third means and relaying unsecured messages to said third means;

a second of said plurality of RAMs storing secure messages received from said third means and relaying secure messages to said third means;

means for receiving said messages stored in said first and second RAMs; and

said means for receiving said messages coupled to said first and second RAMs.

2. A device according to claim 1 wherein said means for receiving said messages comprises:

an operator interface coupled to said first and third means;

said operator interface allowing an operator to communicate directly with said third means or directly with said first means;

said direct communication between said operator interface and said third means allowing an operator to record information to and receive messages from said plurality of RAMs; and

said direct communication between said operator interface and said first means allowing an operator to communicate an external operator or external device without accessing said third and second means.

3. A device according to claim 1 wherein said third means comprises a digital signal processor (DSP).

4. A device according to claim 1 wherein said second RAM is battery powered.

5. A device according to claim 4 wherein the device further comprises:

housing for the device;

battery for supplying power to said second RAM; and

said battery connected to said housing such that when tampering with said housing occurs, said battery no longer supplies power to said second RAM and the information stored on said second RAM is destroyed.

6. A device according to claim 1 wherein the device further comprises:

tamper-proof means coupled to said second RAM; and

said tamper-proof means for eliminating any information stored within said second RAM when the device is tampered with.

7. A device according to claim 6 wherein said tamper-proof means comprises:

battery coupled to said second RAM;

said battery completely powering said second RAM; and

said battery removing power to said second RAM when the device is tampered with.

8. A device according to claim 1 wherein the device further comprises:

tamper-proof means coupled to said third means; and

said tamper-proof means for eliminating any information stored within said third means when the device is tampered with.

9. A device according to claim 8 wherein said tamper-proof means comprises:

a battery source for supplying power to said third means; and

said power is removed when the device is tampered with.

10. A device for receiving and storing information, such as telecommunication messages or transmitted data, for subsequent play-back after the information has been received, the device also transmitting information, such as telecommunication messages or transmitted data, the device comprising:

first means for communicating with an external source;

second means for control the flow of information through the device, said second means separating secure information from non-secure information;

third means for storing secure and un-secure information in separate, distinct locations, including one secure and one unsecure;

said second means coupled to said first means, said second means including a digital signal processor for processing incoming and outgoing information;

said second means further including;

select means for determining when incoming information or outgoing information is secure or unsecured, said select means coupled to said first means;

an encoder/decoder coupled to said select means and said digital signal processor, said encoder/decoder decoding incoming information, and encoding outgoing information;

said digital signal processor coupled to said select means and to said third means;

said select means and said digital signal processor transferring unsecured information directly between each other;

said select means and said digital signal processor transferring secure information through said encode/decode; and

said digital signal processor transferring secure information to and from said secure location of said third means, and transferring unsecured information to and from said unsecured location of said third means;

said first means linking the device with said external source; and

said third means coupled to said second means.

11. A device according to claim 10 wherein said third means comprises:

a plurality of RAMs (random access memory) coupled to said second means;

a first of said plurality of RAMs storing and transferring unsecured information; and

a second of said plurality of RAMs storing and transferring secure information.