×

Method for anodizing a polysilicon layer lower capacitor plate of a DRAM to increase capacitance

  • US 5,068,199 A
  • Filed: 05/06/1991
  • Issued: 11/26/1991
  • Est. Priority Date: 05/06/1991
  • Status: Expired due to Term
First Claim
Patent Images

1. A method of fabricating a storage capacitor having an intrinsic silicon layer doped with an impurity to produce an extrinsic first doped silicon conductive layer forming a storage node capacitor plate comprising the following steps:

  • a) anodizing said first doped silicon layer, said anodizing producing a porous upper surface by consuming portions of said first doped silicon layer to produce micro structures resembling elongated pores, a porosity of said porous upper surface measured by a porous film density, said porous film density equal to the percent of weight loss for a given volume of said first doped silicon layer experience during said anodizing, said anodizing increasing a surface area of said storage node capacitor plate;

    b) depositing a dielectric layer to overlie said first doped silicon layer, said dielectric layer having lower and upper surfaces, the porous upper surface of said first doped silicon layer being in contact at all points with the lower surface of said dielectric layer, said dielectric layer being substantially conformal with the porous upper surface of said first doped silicon layer; and

    c) depositing of an intrinsic silicon layer doped with an impurity to produce an extrinsic second doped silicon conductive layer to overlie said dielectric layer, said second doped silicon layer having lower and upper surfaces, said lower surface being in contact with the upper surface of said dielectric layer and being substantially conformal thereto.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×