External memory having an authenticating processor and method of operating same

• US 5,070,479 A
• Filed: 01/13/1989
• Issued: 12/03/1991
• Est. Priority Date: 06/24/1985
• Status: Expired due to Term

• Current Assignee: Nintendo Company Limited
• Original Assignee: Nintendo Company Limited
• Inventors: Nakagawa, Katsuya
• Primary Examiner(s): Hecker, Stuart N.
• Assistant Examiner(s): Rudolph, Rebecca L.
• Application Number:
  US07/297,105
• Time in Patent Office: 1,054 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 380/3, 380/4, 380/5, 235/380, 235/375, 235/382
• US Class Current: 714/11
• CPC Class Codes: A63F 13/73 Authorising game programs or game devices, e.g. checking authenticity
• CPC Class Codes: A63F 13/95 Storage media specially adapted for storing game information, e.g. video game cartridges
• CPC Class Codes: A63F 2300/201 Playing authorisation given at platform level
• CPC Class Codes: A63F 2300/206 Game information storage, e.g. cartridges, CD ROM's, DVD's, smart cards
• CPC Class Codes: G06F 21/123 by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 2221/2109 Game systems
• CPC Class Codes: G06F 2221/2121 Chip on media, e.g. a disk or tape with a chip embedded in its case
• CPC Class Codes: H05K 5/0256 of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms

Abstract

A system for determining a truth comprises a main unit which is employed together with an external memory, for example, ROM cartridge, floppy disk or the like. The main unit is operated following a program contained in the external memory. In the external memory and the main unit, the same semiconductor devices, for example, microprocessors are incorporated respectively, and the former device acts as a key device and the latter device acts as a lock device. The key device and the lock device are synchronized with each other, executing the same arithmetic operation following the same program. The results of this operation are exchanged with each other, and the two devices compare the result of operation by their own with the result of operation by the other, respectively. If the both coincide, software is determined to be true and the main unit is allowed to operate, but if not coincide, software is determined to be false and the main unit is left reset intact. Thereby, processing in the information processing apparatus is disabled when the software contained in the external memory is not true.

Claims

1. An external memory unit for removable connection to a main video game data processor unit having a video game processing means for executing videographics programs stored in said external memory unit, said video game processing means being capable of being reset, and a dedicated authenticating processing means for executing a first predetermined authenticating program to form an information processing apparatus, said external memory unit comprising:

means for storing a videographics program that is to be executed by said video game processing means;

external authenticating processing means for operating in accordance with a second predetermined authenticating program when said memory unit is connected to the video game data processor unit for verifying that said videographics program stored in said means for storing is authorized for execution by said video game processing means;

means, coupled to said external authenticating processing means and said means for storing, for connecting said external memory unit to said video game data processor unit; and

wherein said external authenticating processor means includes data transfer means coupled to said means for connecting for transferring data related to the results of the execution of said second authenticating program to said dedicated authenticating processing means, whereby the video game processor means in said main video game processor unit is reset unless the results of the execution of the second authenticating program exhibit a predetermined relationship with the results of the first predetermined authenticating program.

2. An external memory in accordance with claim 1, wherein said external authenticating processing means includes clock signal input means, coupled to said means for connecting, for receiving clock signals from said main video game data processor unit, wherein said external authenticating processing means further includes means responsive to said clock signal input means for executing a plurality of instructions in response to each received clock signal.

3. An external memory according to claim 2, wherein said means responsive to said clock signal input means includes frequency divider means for generating a plurality of timing signals each of which initiates the performance of a predetermined processing operation.

4. An external memory according to claim 3, wherein said external authenticating processing means includes means responsive to said plurality of timing signals for receiving data from said dedicated authenticating processing means in response to a first timing signal, for performing predetermined arithmetic operations in response to a second timing signal and for transferring data to said dedicated authenticating processing means in response to a third timing signal.

5. An external memory according to claim 1, wherein said data transfer means further includes input pin means, coupled to said means for connecting, for receiving data related to the results of the execution of said first predetermined authenticating program from said dedicated authenticating processing means and output pin means, coupled to said means for connecting, for transferring data related to the results of the execution of said second predetermined authenticating program to said dedicated authenticating processing means.

6. An external memory according to claim 5, wherein said data transfer means further includes reset pin means for receiving a reset related signal from said dedicated authenticating processing means, said external authenticating processing means including means responsive to said reset related signal for maintaining a reset state or releasing the reset state depending upon the state of the reset related signal.

7. An external memory according to claim 6, wherein said external authenticating processing means includes means responsive to said reset related signal from said dedicated authenticating processing means for releasing its reset state and for synchronizing its operation with the operation of the dedicated authenticating processing means.

8. An external memory according to claim 1, wherein said external authenticating processing means includes means responsive to a clock signal received from said main video game data processor unit for synchronizing its operations with predetermined operations performed by said dedicated authenticating processing means.

9. An external memory according to claim 1, wherein said external authenticating processing means includes a terminal having a predetermined voltage coupled thereto and further includes means responsive to detecting said predetermined voltage for determining the processing operations to be performed by said external authenticating processing means.

10. An external memory according to claim 1, wherein said external authenticating processing means includes means for generating at least one random number in accordance with a predetermined function.

11. An external memory according to claim 10, wherein said means for generating at least one random number includes memory means for storing data representing random numbers and means for reading out at least one random number in accordance with a predetermined function.

12. An external memory according to claim 10, wherein said external authenticating processing means further includes:

means for outputting said at least one random number and transferring said at least one random number to said dedicated authenticating processing means via said means for transferring, means for receiving data generated by said dedicated authenticating processing means via said means for transferring; and

means for performing predetermined processing operations on said data generated by said dedicated authenticating processing means.

13. An external memory according to claim 12, wherein said predetermined processing operations performed by said external authenticating processing means are performed in time coincidence with corresponding processing operations performed in said dedicated authenticating processing means.

14. An external memory according to claim 12 wherein said external authenticating processing means further includes means for outputting the results of said predetermined processing operations and for transferring the results to said dedicated authenticating processing means.

15. An external memory according to claim 14, wherein said external authenticating processing means further includes means for receiving results of corresponding processing operations performed by said dedicated authenticating processing means.

16. An external memory according to claim 15, wherein said external authenticating processing means further includes means for comparing the results generated by said dedicated authenticating processing means with the results generated by said external authenticating processing means.

17. An external memory according to claim 16 wherein said external authenticating processing means further includes means, responsive to the detection of coincidence between the results generated by said external authenticating processing means and said dedicated authenticating processing means, for selecting at least a further arithmetic operation to be performed.

18. An external memory according to claim 17, further including means for storing indicia representing n arithmetic operations, where n is a positive integer, said means for selecting including, means for generating at least a first number and at least a second number, said at least a first number being used to select an arithmetic operation to be performed and said at least a second number being used to define variable values for said selected arithmetic operation.

19. An external memory according to claim 17, wherein said external authenticating processing means includes means for performing said further arithmetic operation and for outputting a result.

20. An external memory according to claim 19, wherein said further arithmetic operation performed by said external authenticating processing means is performed in time coincidence with a corresponding further arithmetic operation performed by said dedicated authenticating processing means.

21. An external memory according to claim 19, further including means for transferring the results of said further arithmetic operation to said dedicated authenticating processing means and for receiving the results of a corresponding further arithmetic operation from said dedicated authenticating processing means.

22. An external memory according to claim 21, wherein said external authenticating processing means further includes means for comparing the results of the further arithmetic operations performed by said external authenticating processing means and by said dedicated authenticating processor means.

23. An external memory according to claim 17, wherein said external authenticating processing means further includes means for repetitively performing further arithmetic operations.

24. An external memory according to claim 23, wherein said means for repetitively performing further arithmetic operations executes further arithmetic operations during the time period that said video game processing means executes said videographics program.

25. An external memory according to claim 22, wherein said external authenticating processing means includes means responsive to said means for comparing the results of the further arithmetic operations to prevent access to said means for storing a videographics program when the results do not coincide.

26. An external memory according to claim 23, further includes means for counting, and wherein said means for repetitively performing said further arithmetic operations continues performing further arithmetic operations until said means for counting reaches a predetermined value.

59. An external memory according to claim 16, wherein said external authenticating processing means includes means for performing further authenticating operations if said means for comparing indicates coincidence between the results generated by said external authenticating processing means and said dedicated authenticating processing means, whereby said external authenticating processing means is operable to perform further authenticating operations at the same time said videographics program is being executed by said video game processing means.

60. An external memory according to claim 1, wherein said external authenticating processing means includes means for performing authenticating operations while said videographics program is being executed by said video game processing means, whereby authenticating operations are performed during the execution of said videographics program without burdening the video game processing means.

27. An external memory system for removable connection to a main data processor unit having a video game processor for executing video game programs stored in said external memory unit, said video game processor being capable of being reset, and a separate authenticating processor for executing a first predetermined authenticating program, said external memory system comprising:

an external memory for storing a videographics program that is to be executed by said video game processor associated with said main data processor unit;

an external authenticating processor for executing a second predetermined authenticating program when said external memory system is connected to the main data processor unit for verifying that said videographics program stored in said external memory is authorized for use in the main data processor unit;

a connector, coupled to said external authenticating processor and said external memory, for interconnecting said authenticating processors and for interconnecting said external memory to said video game processor; and

wherein said external authenticating processor includes a data transfer port for transferring data related to the results of the execution of said second predetermined authenticating program to said separate authenticating processor, whereby the video game processor in said main video game processor unit is reset unless the results of the execution of the second authenticating program exhibit a predetermined relationship with the results of the first predetermined authenticating program.

28. An external memory system in accordance with claim 27, wherein said external authenticating processor includes a clock signal input, coupled to said connector, for receiving clock signals from said main data processor unit, wherein said external authenticating processor executes a plurality of instructions in response to each received clock signal.

29. An external memory system according to claim 28, further including a frequency divider responsive to each received clock signal for generating a plurality of timing signals each of which initiates the performance of a predetermined processing operation.

30. An external memory system according to claim 29, wherein said external authenticating processor responds to said plurality of timing signals by receiving data from said separate authenticating processor in response to a first timing signal, by performing predetermined arithmetic operations in response to a second timing signal and by transferring data to said separate authenticating processor in response to a third timing signal.

31. An external memory system according to claim 27, wherein said data transfer port includes an input pin, coupled to said connector, for receiving data from said separate authenticating processor, an output pin, coupled to said connector, for transferring data to said separate authenticating processor, and at least one reset pin for receiving a reset related signal from said separate authenticating processor, said external authenticating processor responding to said reset related signal by maintaining a reset state or releasing the reset state depending upon the state of the reset related signal.

32. An external system according to claim 31, wherein said external authenticating processor responds to said related reset signal from said separate authenticating processor by releasing its reset state and by synchronizing its operation with the operation of said separate authenticating processor.

33. An external system according to claim 27, wherein said external authenticating processor responds to a clock signal received from said main data processor unit for synchronizing its operation with the operation of said separate authenticating processor.

34. An external system according to claim 27, wherein said external authenticating processor includes a terminal having a predetermined voltage coupled thereto, wherein said external authenticating processor is operable to detect said predetermined voltage and perform predetermined processing operations in response thereto.

35. An external system according to claim 27, wherein said external authenticating processor is operable to generate at least one random number in accordance with a predetermined function.

36. An external system according to claim 27, wherein said external authenticating processor is operable to perform predetermined processing operations in time coincidence with corresponding operations performed by said separate authenticating processor.

37. An external system according to claim 36 wherein said external authenticating processor is operable to output the results of said predetermined processing operations and to transfer the results to said separate authenticating processor.

38. An external system according to claim 37, wherein said external authenticating processor is operable to receive results of corresponding processing operations performed by said separate authenticating processor and to compare its own results with the results generated by said separate authenticating processor.

61. An external memory system according to claim 38, wherein said external authenticating processor is operable to execute further authenticating operations if the results generated by said external authenticating processor means and said separate authenticating processor are identical, whereby said external authenticating processor is operable to perform further authenticating operations at the same time said videographics program is being executed by said video game processor.

62. An external memory system according to claim 27, wherein said external authenticating processor is operable to perform authenticating operations while said videographics programs is being executed by said video game processor, whereby authenticating operations are performed during the execution of said videographics programs without burdening the video game processor.

39. In a video game processing apparatus including:

a main video data processor unit having;

a video game data processor for executing videographics programs and

a separate authenticating data processor for executing a first predetermined authenticating program; and

an external memory system removably connected to said main video data processor unit and having;

a memory for storing at least one videographics software program to be executed by said video game data processor, and

an external authenticating processor for executing a second predetermined authenticating program;

a method of operating the external memory system and the main video data processor unit to determine the authenticity of said external memory system comprising the steps of;

connecting said external memory system to said main video data processor unit;

placing said video game data processor in a reset state;

executing said first predetermined authenticating program by said separate authenticating processor to determine the authenticity of said external memory;

executing said second predetermined authenticating program by said external authenticating processor to determine the authenticity of said external memory;

transferring data relating to the results of the execution of said second predetermined authenticating program from said external authenticating processor to said separate authenticating processor;

comparing the results of the execution of said first and second authenticating programs;

releasing said video game data processor from said reset state and executing said at least one videographics software program by said video game processor if the results of the execution of the first authenticating program exhibit a predetermined relationship to the results of the execution of the second predetermined authenticating program; and

maintaining said video game data processor in said reset state if the results of the execution of said first authenticating program fail to exhibit a predetermined relationship to the results of the execution of the second predetermined relationship.

40. A method according to claim 39 further including the step of simultaneously transmitting clock signals to said separate authenticating processor and said external authenticating processor.

41. A method according to claim 39 further including the steps of:

inputting clock signals to said separate authenticating processor and said external authenticating processor; and

executing a plurality of instructions in said separate authenticating processor and said external authenticating processor in response to each received clock signal.

42. A method according to claim 41, wherein said step of executing a plurality of instructions includes the steps of:

receiving data from said separate authenticating processor in response to a first timing signal,

performing predetermined arithmetic operations in response to a second timing signal; and

transferring data to said separate authenticating processor in response to a third timing signal.

43. A method according to claim 39, wherein said step of transferring data includes the step of transferring data from said separate authenticating processor to said external authenticating processor and from said external authenticating processor to said separate authenticating processor.

44. A method according to claim 39 further including the step of synchronizing the operation of the external authenticating processor with the operation of said separate authenticating processor.

45. A method according to claim 39 wherein said steps of executing said first and second authenticating programs each includes the step of generating at least one random number in accordance with a predetermined function.

46. A method according to claim 45 wherein said step of generating at least one random number includes the step of storing random numbers in a memory device and reading out said random numbers in accordance with a predetermined function.

47. A method according to claim 46, wherein each of said external authenticating processor and said separate authenticating processor reads random data generated by the other processor and performs predetermined processing operations on such data.

48. A method according to claim 47, wherein said predetermined processing operations performed by said external authenticating processor are performed in time coincidence with corresponding operations performed by said separate authenticating processor.

49. A method according to claim 47 further including the steps of outputting the results of said predetermined processing operations and transferring the results to said other processor.

50. A method according to claim 49 further including the step of comparing the results generated by the separate authenticating data processing with the results generated by said external authenticating processor.

51. A method according to claim 50 further including the steps of selecting further arithmetic operations to be performed by said external authenticating processor and said separate authenticating processor in response to detecting coincidence between the results generated by said external authenticating processor and said separate authenticating processor.

52. A method according to claim 51 further including the step of:

storing indicia representing n arithmetic operations, where n is a positive integer, in a memory device associated with each of said external authenticating processor and said separate authenticating processor, and wherein said step of selecting includes, generating at least a first number and at least a second number, and using said at least a first number to select an arithmetic operation to be performed and using said at least a second number to define variable values for said selected arithmetic operation.

53. A method according to claim 51, wherein each of said external authenticating processor and said separate authenticating processor performs said further arithmetic operations and outputs a result.

54. A method according to claim 53, wherein said further arithmetic operations performed by said external authenticating processor are performed in time coincidence with a corresponding further arithmetic operation performed by said separate authenticating processor.

55. A method according to claim 53, wherein said steps of executing said first and second authenticating programs each include the steps of transferring the results of said further arithmetic operations from said separate authenticating processor to said external authenticating processor and transferring the results of said further arithmetic operations from said external authenticating processor to said separate authenticating processor.

56. A method according to claim 55 further including the step of comparing the results of the further arithmetic operations performed by said external authenticating processor with the results of said further arithmetic operation performed by said separate authenticating processor.

57. A method according to claim 51 further including the step of repetitively performing said further arithmetic operations.

58. A method according to claim 51, further including the step of counting the number of times said further arithmetic operations are repetitively performed and wherein said step of repetitively performing said further arithmetic operations is continued until a predetermined count is reached.

63. A method according to claim 50, further including the steps of releasing said video game processor from said reset state if said results coincide and performing further authenticating operations if said results coincide at the same time said videographics program is being executed by said video game processor.

64. A method according to claim 39, further including the step of continuing to execute said first and second authenticating programs while said videographics program is being executed by said video game processor, whereby authenticating operations are performed during the execution of said videographics program without burdening the video game processor.