Active matrix substrate for liquid crystal display

• US 5,075,674 A
• Filed: 11/18/1988
• Issued: 12/24/1991
• Est. Priority Date: 11/19/1987
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Tanaka, Hirohisa, Katayama, Mikio, Morimoto, Hiroshi, Shimada, Yasunori
• Primary Examiner(s): Brier, Jeffery A.
• Application Number:
  US07/273,251
• Time in Patent Office: 1,131 Days
• Field of Search: 340/718, 340/719, 340/765, 340/784, 350/332, 350/333, 350/336
• US Class Current: 345/93
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G02F 1/136263 Line defects
• CPC Class Codes: G02F 1/136268 Switch defects
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence

Abstract

An active matrix substrate for the liquid crystal display has a switching circuit for switching on each of picture elements which includes a corresponding gate bus line, source bus line and a switching transistor. Further, the switching circuit includes at least one redundant structure to avoid inoperativeness of the switching circuit.

Claims

1. A liquid crystal display device comprising:

a transparent insulating substrate;

a plurality of gate bus lines formed in parallel on a surface of said substrate;

a plurality of source bus lines formed in parallel so as to cross said plurality of gate bus lines, wherein each source bus line is insulated from each gate bus line at the respective crossings;

a plurality of transparent picture element electrodes, each of which is formed at a crossing of the gate bus lines and source bus lines; and

a plurality of switching means, each for connecting a picture element electrode to a corresponding source and gate bus line,

each of the plurality of source bus lines including a source bypass bus line, formed only at each crossing with the gate bus lines, thereby forming a pair of source bus lines crossing each gate bus line.

2. The liquid crystal display device of claim 1, wherein each said gate bus line includes a bypass bus line as a redundant structure, said bypass bus line being terminated prior to said gate and source bus line crossing, thereby forming a pair of gate buslines between adjacent source bus lines.

3. The liquid crystal display device of claim 2, wherein each said gate bus line is formed of a double layered, thickness structure, at least in the area in which said bypass line is formed.

4. The liquid crystal display device of claim 1, wherein each said source bus line is formed of a double layered thickness structure, except in the crossing zone thereof with said gate bus line.

5. The liquid crystal display device of claim 1, wherein each of said plurality of switching means includes a plurality of thin film transistors connected in parallel between a common source bus line and a picture element electrode so as to form a plurality of redundant structures and further connected to a common gate line, extended from said gate bus line and formed parallel to said source bus line.

6. The liquid crystal display device of claim 5, wherein said plurality of thin film transistors equals two.

7. A liquid crystal display device comprising:

a transparent insulating substrate;

a plurality of gate bus lines formed in parallel on a surface of said substrate;

a plurality of source bus lines formed in parallel so as to cross said plurality of gate bus lines, wherein each source bus line is insulated from each gate line at the respective crossing and includes a source bypass bus line, formed only at each crossing with the gate bus lines, thereby forming a pair of source bus lines crossing each gate bus line;

a plurality of transparent picture element electrodes, each of which is formed of a crossing of the gate bus lines and source bus lines, each being connected to only one gate bus line and only one source bus line; and

a plurality of switching means including a plurality of thin film transistors, in parallel, each connecting each said picture element to its corresponding only one source bus line;

each of said gate bus line including a bypass bus line as a redundant structure, said bypass bus line being terminated prior to said gate and source bus line crossing, thereby forming a pair of gate bus lines between adjacent source bus lines.

8. The liquid crystal display device of claim 7, wherein each of said plurality of thin film transistors of each said switching means, are further connected to a common gate electrode, extended from a gate bus line and formed parallel to a source bus line.

9. The liquid crystal display device of claim 8, wherein each said gate bus line includes a bypass bus line as a redundant structure, said bypass bus line being terminated prior to said gate and source bus line crossing, thereby forming a pair of gate bus lines between adjacent source bus lines.

10. The liquid crystal display device of claim 9, wherein each said gate bus line is formed of a double layered thickness structure, at least in the area in which said bypass line is formed.

11. The liquid crystal display of claim 7, wherein each said source bus line is formed of a double layered thickness structure except in the crossing zone thereof with said gate bus line.

12. The liquid crystal display device of claim 8, wherein the plurality of thin film transistors equals two.

13. The liquid crystal display device comprising:

a transparent insulating substrate;

a plurality of gate bus lines formed in parallel on a surface of said substrate;

a plurality of source bus lines formed in parallel so as to cross said plurality of gate bus lines, wherein each source bus line is insulated from each gate bus line at the respective crossing;

a plurality of transparent picture element electrodes, each of which is formed of a crossing of the gate bus lines and source bus lines, each being connected to only one gate bus line and only one source bus line; and

a plurality of switching means, each for connecting a picture element electrode to a corresponding source and gate bus line,

each of said plurality of switching means including a plurality of thin film transistors, in parallel, each connecting each said picture element to its corresponding only one source bus line and each of the plurality of thin film transistors further connected to a common gate electrode extended from a gate bus line and formed parallel to the source bus line;

each of said gate bus lines including a bypass bus line as a redundant structure, said bypass bus line being terminated prior to said gate and source bus line crossing, thereby forming a pair of gate bus lines between adjacent source bus lines.

14. The liquid crystal display device of claim 13 wherein each said gate bus line is formed of a double layered thickness structure, at least in the area in which said bypass line is formed.

15. The liquid crystal display of claim 13, where each of the plurality of source bus lines include a source bypass bus line, formed only at each crossing with the gate bus lines, thereby forming a pair of source bus lines crossing each gate bus line.

16. The liquid crystal display of claim 13, wherein each said source bus line is formed of a double layered thickness structure except in the crossing zone thereof with said gate bus line.

17. The liquid crystal display device of claim 13, wherein the plurality of thin film transistors equals two.