Novel spread spectrum codec apparatus and method
First Claim
Patent Images
1. A spread spectrum encoding apparatus for generating a code sequence comprising an ordered sequence of values from an ordered sequence of symbols, said encoding apparatus comprising:
- means for receiving an input signal comprising predetermined number of symbols from said ordered sequence of symbols;
memory means for storing at least a portion of a first spread spectrum basis having a multiplier μ
comprising one or more channel sequences, the mth said channel sequence comprising an array of numerical values wp, where p runs from 0 to L-1, wherein each said channel sequence being of length L, the number of said stored channel sequences being less than or equal to μ
, wherein ##EQU6## where (*) denotes complex conjugation, E is a constant, μ
is a positive integer, and the sum is performed over all values of p for which wp (i) and wp+μ
q (j) are non-zero;
clock means for generating a sequence of timing signals;
control means connected to said memory means and said receiving means for generating a sum array comprising an ordered array of numerical values β
(k), for k=0 to (L-1), said control means comprising means for selecting a said channel sequence corresponding to each of said predetermined number of symbols, for multiplying said selected channel sequence by a numerical value depending on said corresponding received symbol, and for adding corresponding values of said multiplied channel sequences to form said ordered array β
(k);
means for storing a spread spectrum array comprising an ordered array of numerical values α
(k) for k=0 to L-1;
means connected to control means and said spread spectrum array storing means for combining said sum array with said spread spectrum array comprising means for adding β
(k) to α
(k), said combining means being responsive to said clock means having generated μ
q said timing signals, where q is a positive integer; and
shifting means for outputting α
(L-1) as the next value in said generated code sequence, for replacing α
(k) by α
(k-1) for k=1 to (L-1), and for replacing α
(0) by 0, said shifting means being connected to said spread spectrum array storing means and being responsive to said clock means having generated a said timing signal.
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Abstract
A system comprising apparatuses and methods for encoding and decoding spread spectrum signals is disclosed. Signals are encoded by modulating numerical sequences selected from an orthonormal basis of numerical sequences to provide channel coding. The modulated sequences are then combined to form an encoded signal. Because of the orthonormal character of the sequences, the encoded signal may be easily decoded using a matched filter. A method for generating long sequences from the product of shorter sequences is also disclosed.
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Citations
14 Claims
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1. A spread spectrum encoding apparatus for generating a code sequence comprising an ordered sequence of values from an ordered sequence of symbols, said encoding apparatus comprising:
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means for receiving an input signal comprising predetermined number of symbols from said ordered sequence of symbols; memory means for storing at least a portion of a first spread spectrum basis having a multiplier μ
comprising one or more channel sequences, the mth said channel sequence comprising an array of numerical values wp, where p runs from 0 to L-1, wherein each said channel sequence being of length L, the number of said stored channel sequences being less than or equal to μ
, wherein ##EQU6## where (*) denotes complex conjugation, E is a constant, μ
is a positive integer, and the sum is performed over all values of p for which wp (i) and wp+μ
q (j) are non-zero;clock means for generating a sequence of timing signals; control means connected to said memory means and said receiving means for generating a sum array comprising an ordered array of numerical values β
(k), for k=0 to (L-1), said control means comprising means for selecting a said channel sequence corresponding to each of said predetermined number of symbols, for multiplying said selected channel sequence by a numerical value depending on said corresponding received symbol, and for adding corresponding values of said multiplied channel sequences to form said ordered array β
(k);means for storing a spread spectrum array comprising an ordered array of numerical values α
(k) for k=0 to L-1;means connected to control means and said spread spectrum array storing means for combining said sum array with said spread spectrum array comprising means for adding β
(k) to α
(k), said combining means being responsive to said clock means having generated μ
q said timing signals, where q is a positive integer; andshifting means for outputting α
(L-1) as the next value in said generated code sequence, for replacing α
(k) by α
(k-1) for k=1 to (L-1), and for replacing α
(0) by 0, said shifting means being connected to said spread spectrum array storing means and being responsive to said clock means having generated a said timing signal. - View Dependent Claims (2, 3, 4, 5)
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6. A spread spectrum decoding apparatus for decoding a spread spectrum encoded input signal to generate a decoded signal, said apparatus comprising:
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means for receiving said input signal; clock means for generating a sequence of timing signals; means connected to said receiving means and said clock means for generating an ordered sequence of numerical values from said input signal and for storing the previously generated L said numerical values, said generating means being responsive to said timing signals; memory means for storing at least a portion of a first spread spectrum basis having a multiplier μ
comprising one or more channel sequences, the mth said channel sequence comprising an array of numerical values wp where p runs from 0 to L-1, wherein each said channel sequence is of length L, the number of said stored channel sequences being less than or equal to μ
, wherein ##EQU7## where (*) denotes complex conjugation, E is a constant, μ
is a positive integer, and the sum is performed over all values of p for which wp (i) and wp+μ
q (j) are non-zero;correlation means connected to said memory means and said generating means for generating a signal related to the cross-correlation of said previously generated L said numerical values and a said channel sequence stored in said memory means, said correlation means being responsive to said clock means having generated qμ
said timing signals wherein q is a predetermined positive integer; andmeans connected to said correlation means for outputting a value representing said decoded signal, said value being related to said generated signal generated by said correlation means. - View Dependent Claims (7, 8, 9)
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10. A method for encoding a spread spectrum signal comprising the steps:
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receiving an input signal comprising an ordered sequence of symbols; storing at least a portion of a first spread spectrum basis having a multiplier μ
comprising one or more channel sequences, the mth said channel sequence comprising an array of numerical values wp where p runs from 0 to L-1, wherein each said channel sequence is of length L, the number of said stored channel sequences being less than or equal to μ
, wherein ##EQU8## where (*) denotes complex conjugation, E is a constant, μ
is a positive integer, and the sum is performed over all values of p for which wp (i) and wp+μ
q (j) are non-zero;generating a sequence of timing signals; generating a sum array comprising an ordered array of numerical values β
(k), for k=0 to (L-1), said control means comprising means for selecting a said channel sequence corresponding to each of said predetermined number of symbols, for multiplying said selected channel sequence by a numerical value depending on said corresponding received symbol, and for adding corresponding values of said multiplied channel sequences to form said ordered array β
(k);storing a spread spectrum array comprising an ordered array of numerical values α
(k) for k=0 to L-1;combining said sum array with said spread spectrum array comprising means for adding β
(k) to α
(k), said combining means being responsive to said clock means having generated μ
q said timing signals, where q is a positive integer; andat each timing signal, outputting α
(L-1) as the next value in said generated code sequence, for replacing α
(k) by α
(k-1) for k=1 to (L-1), and for replacing α
(0) by 0. - View Dependent Claims (11, 12, 13, 14)
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Specification