State machine controlled video processor

• US 5,083,119 A
• Filed: 12/19/1988
• Issued: 01/21/1992
• Est. Priority Date: 02/11/1988
• Status: Expired due to Term

• Current Assignee: 3DLabs Incorporated Limited (Creative Technology Ltd.)
• Original Assignee: Du Pont Pixel Systems Limited
• Inventors: Trevett, Neil F., Wilson, Malcolm E.
• Primary Examiner(s): Brier, Jeffery A.
• Application Number:
  US07/286,080
• Time in Patent Office: 1,128 Days
• Field of Search: 340/721, 340/724, 340/726, 340/731, 340/798, 340/799, 340/723, 340/734
• US Class Current: 345/559
• CPC Class Codes: G09G 5/14 Display of multiple viewports
• CPC Class Codes: G09G 5/346 for systems having a bit-mapped display memory
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/391 Resolution modifying circuits, e.g. variable screen formats
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence
• CPC Class Codes: G09G 5/397 Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay G09G5/02 takes precedence

Abstract

A system and method of merging and manipulating pixel information for display on a raster scan monitor is disclosed. The invention operates at speeds imperceptible to the viewer by collecting, in each memory access cycle, the data representing multiple pixels and by performing merge and manipulation functions on pixel groups at video rate under control of control data from a state machine. The state machine allows for unique processing decisions to be made for every pixel group displayed on the monitor.

Claims

1. An image processing apparatus, comprising:

clock means for supplying a clock signal;

first register means responsive to the clock means to load and hold a pixel group of pixel data;

second register means responsive to the clock means to load and hold the pixel group of pixel data held in the first register means;

output register means to hold a group of pixel data;

distribution means operable to supply to each pixel location in the output register means, the pixel data in any respective selected one of the pixel locations in the first and second register means.

2. The apparatus of claim 1, further comprising a state machine for controlling the selection of the pixel locations.

3. An image processing apparatus, comprising:

memory means for storing pixel data relating to an image;

reading means for reading pixel data from the memory means in a predetermined order and providing the read pixel data distributed in pixel groups of predetermined size;

processing means for receiving the pixel groups and modifying the distribution of the pixel data among the pixel groups; and

control means for supplying control data individually determined for each modified pixel group, the processing means being responsive to the control data once for each modified pixel group which is formed and being operable to modify the distribution of pixel data in accordance with the control data.

4. The apparatus of claim 3, wherein the control means includes a state machine.

5. The apparatus of claim 4, in which the state machine comprises a random access memory.

6. An image processing apparatus comprising:

first and second memory means for storing pixel data relating to first and second images respectively;

first and second reading means for reading pixel data from the first and second memory means respectively in a predetermined order and providing the read pixel data distributed in pixel groups of predetermined size;

processing means for receiving the pixel groups and modifying the distribution of the pixel data among the pixel groups, said processing means being selectably operable to form at least one of the processed pixel groups from a mixture of pixel data from the first reading means and from the second reading means.

7. The apparatus of claim 6, wherein each of said first and second memory means comprises a video RAM and the reading means includes a shift register for reading a line of pixel data from the video RAM.

8. The apparatus of claim 6 further comprising output means for producing an image from the processed pixel groups.

9. The apparatus of claim 8, wherein the output means includes a bit mapped display device.

10. The apparatus of claim 9, wherein the processed pixel groups have the same format as the received pixel groups.

11. The apparatus of claim 6, wherein the processing means is also selectably operable to shift the locations of pixel data in the pixel groups.

12. The apparatus of claim 6, wherein the processing means is also selectably operable to repeat at least some of the pixel data in the pixel groups and to shift the pixel data in and amongst the pixel groups to accommodate the repeated pixel data.

13. The apparatus of claim 6, wherein the processing means comprises means for receiving pixel data in the form of a pixel group, means for outputting pixel data in the form of a pixel group, and distributing means for causing each pixel data in the output pixel group to be selected from any respective one of the pixel data in the received pixel group.

14. The apparatus of claim 13, wherein the distributing means is operable to select at least two of the pixel data for adjacent pixels in an output pixel group from the same pixel data in the received pixel group.

15. The apparatus of claim 13, wherein the pixel data receiving means is operable to receive two pixel groups, the distributing means being operable to select each pixel data in an output pixel group from any respective selected one of the pixel data in the two received pixel groups.

16. The apparatus of claim 15, wherein the received pixel groups relate to two successive pixel groups for the same image, and the distributing means includes means to temporarily store the earlier of the two received pixel groups.

17. The apparatus of claim 15, wherein the received pixel groups relate to different images.

18. The apparatus of claim 6, further comprising control means for supplying control data, the processing means being responsive to the control data once for each modified pixel group which is formed and being operable to modify the distribution of pixel data in accordance with the control data.

19. The apparatus of claim 18, wherein the control means includes a state machine operable to determine said control signal individually for each modified pixel group.

20. The apparatus of claim 19, wherein the state machine comprises a random access memory.

21. A method of providing an image window on a display monitor comprising the steps of:

(a) accessing a first pixel group of pixel data relating to a first image;

(b) accessing a second pixel group of pixel data relating to a second image;

(c) receiving control data;

(d) selecting, responsive to the control data, the pixel data from the first pixel group to be displayed in each pixel group position of each horizontal scan line of the display monitor; and

(e) selecting, responsive to the control data, the pixel data from the second pixel group to be displayed in each pixel group position of each horizontal scan line of the display monitor.

22. An image processing apparatus comprising:

first memory means for storing pixel data relating to an image;

first reading means for reading pixel data from the memory means in a predetermined order and providing the read pixel data distributed in pixel groups of predetermined size; and

processing means for receiving the pixel groups and modifying the distribution of the pixel data among the pixel groups, said processing means being selectably operable to repeat at least some of the pixel data in the pixel groups and to shift the pixel data in and amongst the pixel groups to accommodate the repeated pixel data.

23. The apparatus of claim 22, wherein the memory means comprises a video RAM and the reading means includes a shift register for reading a line of pixel data from the video RAM.

24. The apparatus of any of claims 22 or 23, further comprising output means for producing an image from the processed pixel groups.

25. The apparatus of claim 24, wherein the output means includes a bit mapped display device.

26. The apparatus of claim 22, wherein the processing means is also selectably operable to shift the locations of pixel data in the pixel groups without repetition.

27. The apparatus of claim 22, further comprising second memory means for storing pixel data relating to another image;

and second reading means for reading pixel data from the second memory means;

the processing means being operable to form at least one of the processed pixel groups from a mixture of pixel data from the first reading means and from the second reading means.

28. The apparatus of claim 22, wherein the processing means comprises means for receiving pixel data in the form of a pixel group, means for outputting pixel data in the form of an output pixel group, and distributing means for causing each pixel data in the output pixel group to be selected from any respective one of the pixel data in the received pixel group.

29. The apparatus of claim 28, wherein the distributing means is operable to select at least two of the pixel data for adjacent pixels in an output pixel group from the same pixel data in the received pixel group.

30. The apparatus of claim 28, wherein the pixel data receiving means is operable to receive two pixel groups, the distributing means being operable to select each pixel data in an output pixel group from any respective selected one of the pixel data in the two received pixel groups.

31. The apparatus of claim 30, wherein the received pixel groups relate to two successive pixel groups for the same image, the distributing means including means to store temporarily the earlier of the two received pixel groups.

32. The apparatus of claim 31, wherein the received pixel groups relate to different images.

33. The apparatus of claim 32, further comprising control means for supplying control data, the processing means being responsive to the control data once for each modified pixel group which is formed and being operable to modify the distribution of pixel data in accordance with the control data.

34. The apparatus of claim 33, wherein the control means includes a state machine operable to determine said control signal individually for each modified pixel group.

35. The apparatus of claim 34, wherein the state machine comprises a random access memory.

36. A method of magnifying an image on a display monitor by predetermined horizontal and vertical magnification factors comprising the steps of:

(a) accessing a first pixel group of pixel data;

(b) accessing a second pixel group of pixel data;

(c) receiving control data;

(d) selecting from among the pixel data in the first and second pixel groups, responsive to said control data;

(e) forming an output pixel group of pixel data by causing at least one of the selected pixel data to appear in a predetermined plural number of consecutive positions in the output pixel group;

(f) repeating steps a, b and c, d and e for a number of horizontal scan lines of the display monitor.