Ultra-thin circuit fabrication by controlled wafer debonding

• US 5,091,331 A
• Filed: 04/16/1990
• Issued: 02/25/1992
• Est. Priority Date: 04/16/1990
• Status: Expired due to Term

• Current Assignee: Intersil Corporation (Renesas Electronics Corporation)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Delgado, Jose A., Gaul, Stephen J., Rouse, George V., McLachlan, Craig J.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): FOURSON III, GEORGE R
• Application Number:
  US07/509,405
• Time in Patent Office: 680 Days
• Field of Search: 437/226, 437/227, 437/62, 437/86, 437/974, 148/DIG. 28, 148/DIG. 12, 156/630
• US Class Current: 438/458
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/3043 Making grooves, e.g. cutting
• CPC Class Codes: H01L 2223/54453 for use prior to dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 148/028 Dicing

Abstract

A process including forming peaks and valleys in a bonding surface of a first wafer so that the peaks are at the scribe lines which define dice. The peaks and not the valleys of the first wafer is bonded to a bonding surface of a second wafer. The device forming steps are performed on one of the wafers. Finally, the wafer in which the devices are formed is cut through at the peaks to form the dice. The peaks may be substantially the size of the kerf produced by the cutting such that the dice are separated from the other wafer by the cutting step. Alternately, the peaks may have a width greater than the kerf produced by the cutting and remain attached to the other wafer by the remaining peak portions. The dice are then separated from the other wafer at the remaining peak portions by an additional step.

Claims

1. A method of fabricating integrated circuits in wafers comprising:

forming peaks and valleys in a bonding surface of a first wafer, with the peaks being at the scribe lines which define dice;

oxygen bonding said peaks and not said valleys of said first wafer to a bonding surface of a second wafer;

performing device formation steps on a surface of one of said first and second wafers;

cutting through said one of said first and second wafers and said peaks to form dice; and

separating said dice from said other of said wafers.

2. A method according to claim 1 wherein said peaks are formed to have a width substantially equal to the kerf produced in the cutting step whereby the dice of said one of said wafers are separated from the other of said first and second wafers by said cutting step.

3. A method according to claim 1 wherein said peaks are formed to have a width greater than the kerf produced in the cutting step, whereby the dice of said one of said wafers remain attached to the other of said first and second wafers by remaining peaks after said cutting step;

and

separating said dice from said other of said wafers at said remaining peaks.

4. A method according to claim 3 wherein said separating step includes applying ultra-sound to said wafers.

5. A method according to claim 3, wherein said separating step includes etching said remaining peaks.

6. A method according to claim 3, wherein said separating step includes mechanically breaking the bond at said remaining peaks.

7. A method according to claim 1 wherein said forming peaks and valleys step includes selectively etching said bonding surface of said first wafer to form valleys between unetched peaks.

8. A method according to claim 1 wherein said peaks are formed to have a height sufficient to prevent said valleys from bonding to said second wafer.

9. A method according to claim 1 wherein said device formation steps are performed on said first wafer.

10. A method of fabricating integrated circuits in wafers comprising:

forming peaks and valleys in a bonding surface of a first wafer, with the peaks being at the scribe lines which define dice;

forming a layer in said valleys of material which will not bond with a second wafer;

oxygen bonding said peaks and not said valleys of said first wafer to a bonding surface of a second wafer;

performing device formation steps on a surface of one of said first and second wafers; and

cutting through said one of said first and second wafers and said peaks to form dice.

11. A method according to claim 10 wherein said layer of material is formed in said valley to have a thickness less than the height of said peaks.

12. A method according to claim 10 wherein said material in said valley is conductive;

and including patterning said material.

13. A method according to claim 10 wherein said material is a diamond film.

14. A method of fabricating integrated circuits in wafers comprising:

forming peaks and valleys in a bonding surface of a first wafer, with the peaks being at the scribe lines which define dice, selectively introducing impurities into said bonding surface of said first wafer to form areas of enhanced oxidation susceptibility and oxidizing said bonding surface of said first wafer to form oxide peaks at said areas of enhanced oxidation susceptibility;

oxygen bonding said peaks and not said valleys of said first wafer to a bonding surface of a second wafer;

performing device formation steps on a surface of one of said first and second wafers; and

cutting through said one of said first and second wafers and said peaks to form dice.

15. A method of fabricating integrated circuits in wafers comprising:

forming peaks and valleys in a bonding surface of a first wafer, with the peaks being at the scribe lines which define dice, by masking said bonding surface of said first wafer with an oxide inhibiting material having openings to expose areas of said bonding surface and oxidizing said exposed areas of said bonding surface to form peaks on said exposed areas;

oxygen bonding said peaks and not said valleys of said first wafer to a bonding surface of a second wafer;

performing device formation steps on a surface of one of said first and second wafers; and

cutting through said one of said first and second wafers and said peaks to form dice.

16. A method of fabricating integrated circuits in wafers comprising:

forming peaks and valleys in a bonding surface of a first wafer, with the peaks being at the scribe lines which define dice, by depositing a bonding material on said bonding surface of said first wafer and subsequent patterning of said deposited bonding material to form the peaks and valleys;

oxygen bonding said peaks and not said valleys of said first wafer to a bonding surface of a second wafer;

performing device formation steps on a surface of one of said first and second wafers; and

cutting through said one of said first and second wafers and said peaks to form dice.