Direct conversion receiver with dithering local carrier frequency for detecting transmitted carrier frequency

• US 5,091,921 A
• Filed: 04/20/1990
• Issued: 02/25/1992
• Est. Priority Date: 04/20/1989
• Status: Expired due to Term

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Minami, Yoichiro
• Primary Examiner(s): Chin, Stephen
• Application Number:
  US07/511,696
• Time in Patent Office: 676 Days
• Field of Search: 375/45, 375/80, 375/82, 375/83, 375/84, 375/85, 375/88, 375/104, 375/97, 329/300, 329/302, 329/303, 328/134, 328/141, 333/215
• US Class Current: 375/334
• CPC Class Codes: H04L 27/1525 using quadrature demodulation
• CPC Class Codes: H04L 27/16 Frequency regulation arrangements

Abstract

An FSK receiver includes first and second channel paths to which the received FSK signals are applied. Each channel path includes a mixer circuit, a low-pass filter connected to the mixer circuit, and a limiting amplifier connected to the low-pass filter. A voltage-controlled oscillator generates a local carrier and a phase shifter applies its output to the mixer circuits with a 90° phase difference therebetween. A frequency detector is coupled to one of the limiting amplifiers for generating a signal representative of the deviation frequency minus the offset frequency of the received FSK signal. An average circuit detects an average value of the signal from the frequency detector. A comparator circuit detects whether the frequency representative signal lies in or outside of the neighborhood of the average value. A ramp voltage of constant amplitude is periodically generated if the signal is detected as lying outside of the neighborhood and maintained at an instantaneous value if the signal is detected as lying in the neighborhood. The voltage-controlled oscillator is responsive to the ramp generator to control the frequency of the local carrier in search of the transmitted carrier frequency.

Claims

1. A receiver for receiving a digitally modulated radio frequency signal at a transmitted carrier frequency, which has a frequency deviation, comprising:

a first voltage-controlled oscillator for generating a first local carrier;

a mixer circuit for mixing the received signal with said first local carrier for converting the frequency of the received radio signal to a baseband frequency;

a low-pass filter for filtering a baseband signal from said mixer circuit;

a limiting amplifier connected to an output of said low-pass filter;

a frequency detector coupled to an output of said limiting amplifier for generating a signal representative of a variation frequency of the received radio signal, said variation frequency equaling the deviation frequency of the transmitted carrier frequency minus an offset between the transmitted and first local carrier frequencies;

an average circuit for averaging the signal from the frequency detector to produce a signal representative of the deviation frequency of the received radio signal;

a comparator circuit for detecting whether the signal from the frequency detector lies in or outside of the neighborhood of a frequency represented by the signal from the average circuit; and

a ramp generator for periodically generating a ramp voltage of constant amplitude when the signal from the frequency detector is detected as lying outside of said neighborhood and holding said ramp voltage at an instantaneous value when said signal is detected as lying in said neighborhood, said first voltage-controlled oscillator being responsive to an output voltage of said ramp generator to control the frequency of said first local carrier.

2. A receiver as claimed in claim 1, wherein said first voltage-controlled oscillator is a voltage-controlled crystal oscillator.

3. A receiver as claimed in claim 1, wherein said comparator circuit comprises:

an offset circuit for establishing high and low reference voltages respectively above and below a voltage represented by the signal from the average circuit; and

means for detecting when said signal from the frequency detector lies in or outside or a range between said high and low reference voltages.

4. A receiver as claimed in claim 1, wherein said frequency detector comprises an edge detector for generating a pulse at a transition of each pulse supplied from said limiting amplifier, and a second low-pass filter for low-pass filtering said pulse generated by said edge detector.

5. A receiver as claimed in claim 1, wherein said average circuit comprises a first-order integrator having a time constant greater than a reciprocal of transmission rate of the received signal.

6. A receiver as claimed in claim 1, wherein said ramp generator is oscillated so that there is at least one ramp voltage during a symbol interval.

7. A receiver as claimed in claim 6, wherein said ramp generator comprises:

a capacitor connected to the control input of said first voltage-controlled local oscillator;

first and second comparators for comparing a voltage developed in said capacitor with high and low thresholds and generating a first signal when said voltage is higher than the high threshold and a second signal when said voltage is lower than the low threshold;

a latch circuit for assuming a first logic state in response to said first signal and a second logic state in response to said second signal;

series-connected first and second constant current sources respectively responsive to said first and second logic states, a junction between said first and second constant current sources being coupled to said capacitor for causing it to be charged and discharged in response to said logic states; and

switch means for causing said constant current sources to present an open circuit to said capacitor when said signal is detected as lying in said neighborhood.

8. A receiver as claimed in claim 2, further comprising a phase-locked loop, comprising:

a second voltage-controlled oscillator for generating a second local carrier based upon said first local carrier;

first and second variable frequency dividers connected respectively to outputs of the first voltage-controlled crystal oscillator and said second voltage-controlled oscillator;

a phase detector for detecting a difference in phase between outputs of the first and second variable frequency dividers;

a low-pass filter for applying a filtered output of said phase detector to the second voltage-controlled oscillator; and

means for equally setting dividing factors of said first and second variable frequency dividers.

9. A receiver as claimed in claim 8, wherein said setting means comprises a read only memory.

10. A receiver as claimed in claim 1, wherein said low-pass filter comprises a gyrator circuit and a capacitor connected to an output terminal of said gyrator circuit.

11. A receiver as claimed in claim 10, wherein said gyrator circuit comprises:

first and second transconductance amplifier stages, each having first and second input terminals and an output terminal, the first input terminal of the first transconductance amplifier stage being connected to the second input terminal of the second transconductance amplifier stage, and the output terminal of the second transconductance amplifier stage being connected to the second input terminal of the first transconductance amplifier stage;

third and fourth transconductance amplifier stages, each having first and second input terminals and an output terminal, the first input terminal of the third transconductance amplifier stage being connected to the second input terminal of the fourth transconductance amplifier stage, and the output terminal of the fourth transconductance amplifier stage being connected to the second input terminal of the third transconductance amplifier stage and to the output terminal of said first transconductance amplifier stage, the first capacitor being connected to the first input of the fourth transconductance amplifier stage;

a second capacitor connected to the second input terminal of said third transconductance amplifier stage; and

means for biasing the first input terminals of the first and third transconductance amplifier stages and biasing the second input terminals of the second and fourth transconductance amplifier stages.

12. A receiver for receiving a frequency shift keyed (FSK) signal on a radio-frequency carrier, which includes a frequency deviation, comprising:

first and second channel paths to which the received FSK signals are applied, each channel path including a mixer circuit, a low-pass filter connected to the mixer circuit, and a limiting amplifier connected to the low-pass filter;

a first voltage-controlled oscillator for generating a first local carrier;

a phase shifter for producing local carriers in quadrature phase relationship from the local carrier supplied from the first voltage-controlled oscillator and respectively applying the quadrature local carriers to the mixer circuits;

a frequency detector coupled to one of the limiting amplifiers for generating a signal representative of a variation frequency of the received FSK signal, said variation frequency equaling the deviation frequency of said radio-frequency carrier minus an offset between the radio-frequency carrier and the local carrier;

an average circuit for averaging the signal from the frequency detector and producing a signal representative of the deviation frequency of the received radio signal;

a comparator circuit for detecting whether the signal from the frequency detector lies in or outside of the neighborhood of a frequency represented by the signal from the average circuit; and

a ramp generator for periodically generating a ramp voltage of constant amplitude when the signal from the frequency detector is detected as lying outside of said neighborhood and holding said ramp voltage at an instantaneous value when said signal is detected as lying in said neighborhood, said voltage-controlled oscillator being representative to an output voltage of said ramp generator to control the frequency of said local carrier.

13. A receiver as claimed in claim 12, wherein said first voltage-controlled oscillator is a voltage-controlled crystal oscillator.

14. A receiver as claimed in claim 13, wherein said comparator circuit comprises:

an offset circuit for establishing high and low reference voltages respectively above and below a voltage represented by the signal from the average circuit; and

means for detecting whether said signal from the frequency detector lies in or outside of a range between said high and low reference voltages.

15. A receiver as claimed in claim 13, wherein said frequency detector comprises an edge detector for generating a pulse at a transition of each pulse supplied from one limiting amplifier, and a second low-pass filter for low-pass filtering said pulse generated by said edge detector.

16. A receiver as claimed in claim 13, wherein said average circuit comprises a first-order integrator having a time constant greater than a reciprocal of transmission rate of the received signal.

17. A receiver as claimed in claim 13, wherein said ramp generator is oscillated so that there is at least one ramp voltage during a symbol interval.

18. A receiver as claimed in claim 17, wherein said ramp generator comprises:

a capacitor connected to the control input of said first voltage-controlled local oscillator,

first and second comparators for comparing a voltage developed in said capacitor with high and low thresholds and generating a first signal when said voltage is higher than the high threshold and a second signal when said voltage is lower than the low threshold;

a latch circuit for assuming a first logic state in response to said first signal and a second logic state in response to said second signal;

series-connected first and second constant current sources respectively responsive to said first and second logic states, a junction between said first and second constant current sources being coupled to said capacitor for causing it to be respectively charged and discharged in response to said logic state; and

switch means for causing said constant current sources to present an open circuit to said capacitor if said signal is detected as lying in said neighborhood.

19. A receiver as claimed in claim 14, further comprising a phase-locked loop connected between the output of the first voltage-controlled crystal oscillator and said phase shifter, comprising:

a second voltage-controlled oscillator for supplying a second local carrier to said phase shifter based upon said first local carrier;

first and second variable frequency dividers connected respectively to outputs of the first voltage-controlled crystal oscillator and said second voltage-controlled oscillator;

a phase detector for detecting a difference in phase between outputs of the first and second variable frequency dividers;

a low-pass filter for applying a filtered output of said phase detector to the second voltage-controlled oscillator; and

means for equally setting dividing factors of said first and second variable frequency dividers.

20. A receiver as claimed in claim 19, wherein said setting means comprises a read only memory.

21. A receiver as claimed in claim 13, wherein each of said low-pass filters comprises a gyrator circuit and a capacitor connected to an output terminal of said gyrator circuit.

22. A receiver as claimed in claim 21, wherein said gyrator circuit comprises:

first and second transconductance amplifier stages, each having first and second input terminals and an output terminal, the first input terminal of the first transconductance amplifier stage being connected to the second input terminal of the second transconductance amplifier stage, and the output terminal of the second transconductance amplifier stage being connected to the second input terminal of the first transconductance amplifier stage;

third and fourth transconductance amplifier stages, each having first and second input terminals and an output terminal, the first input terminal of the third transconductance amplifier stage being connected to the second input terminal of the fourth transconductance amplifier stage, and the output terminal of the fourth transconductance amplifier stage being connected to the second input terminal of the third transconductance amplifier stage and to the output terminal of said first transconductance amplifier stage, the first capacitor being connected to the first input of the fourth transconductance amplifier stage;

a second capacitor connected to the second input terminal of said third transconductance amplifier stage; and

means for biasing the first input terminals of the first and third transconductance amplifier stages and biasing the second input terminals of the second and fourth transconductance amplifier stages.

23. A receiver as claimed in claim 13, further comprising a power saving circuit for cutting off power supplies to one of said channel paths when said signal is detected as lying outside of the neighborhood of said average value.

24. A receiver for receiving a frequency shift keyed (FSK) signal on a radio-frequency carrier, comprising:

first and second channel paths to which the received FSK signal is applied, said first and second channel paths including respectively first and second mixer conduits, first and second low-pass filters respectively connected to the first and second mixer circuits, and first and second limiting amplifiers respectively connected to the first and second low-pass filters;

voltage-controlled oscillator means for generating a local carrier;

phase shifter means for producing local carriers in quadrature phase relationship from the local carrier supplied from the voltage-controlled oscillator and respectively applying the quadrature local carriers to the first and second mixer circuits;

frequency control means connected to said first limiting amplifier for detecting frequency fluctuations in said local carrier generated by the oscillator means with respect to a representative of said frequency fluctuations and supplying said control signal to said oscillator means to remove said frequency fluctuations; and

demodulator means coupled to said first and second limiting amplifiers for demodulating said received FSK signal to produce a demodulated signal.

25. A receiver as claimed in claim 24, further comprising local carrier frequency setting means connected to the output of said frequency control means for setting the frequency of said local carrier of said voltage-controlled oscillator means substantially at the frequency of said FSK signal.

26. A receiver as claimed in claim 24, further comprising power saving circuit mans for cutting off power supplies to the circuits on said second channel path when said frequency control means is in a hunting mode.