Integrating photosensor and imaging system having wide dynamic range

• US 5,097,305 A
• Filed: 02/19/1991
• Issued: 03/17/1992
• Est. Priority Date: 02/19/1991
• Status: Expired due to Term

• Current Assignee: Foveon, Inc. (Avis Budget Group Incorporated)
• Original Assignee: Synaptics Incorporated
• Inventors: Faggin, Federico, Mead, Carver A.
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US07/657,128
• Time in Patent Office: 392 Days
• Field of Search: 357/30 P, 357/30 G, 357/30 H, 357/32, 357/24 LR, 357/42, 357/46, 357/86, 330/59
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14681 Bipolar transistor imagers

Abstract

An integrating photosensor includes an NPN phototransistor having its collector connected to a source of positive voltage, a P-channel MOS transistor having its gate connected to row-select line, its source connected to the emitter of the phototransistor, and its drain connected to a column sense line. The NPN phototransistor has an intrinsic base-collector capacitance. An integrating sense amplifier according to the present invention includes an amplifying element having an inverting input and a non-inverting input. The non-inverting input is connected to a source of reference voltage the inverting input is connected to a sense line. A P-channel balance transistor is connected between the inverting input and the output of the amplifying element and a capacitor is also connected between the inverting input and output of the amplifying element. An exponential feedback element is connected between the output and the inverting input of the amplifying element. A plurality of integrating photosensors is disposed in an array of rows and columns, with a given row select line connected to the gates of P-channel MOS transistors associated with that given row and a given column sense line connected to the drains of the P-channel MOS transistors associated with that given column.

Claims

1. An integrating imaging array disposed on a single piece of semiconductor substrate material, including:

a plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said integrating photosensors including a bipolar phototransistor having a base, a collector, and an emitter, said collector connected to a voltage source, a sense node, an enable node, a semiconductor switch connected between said emitter and said sense node, said semiconductor switch having a control input connected to said enable node;

a plurality of row lines, a unique one of said row lines associated with a particular row in said array, the enable nodes of all of said integrating photosensors associated with said particular row connected to said unique one of said row lines;

a plurality of sense lines, a unique one of said sense lines associated with a particular column in said array, the sense nodes of all of said integrating photosensors associated with said particular column connected to said unique one of said column lines;

a plurality of sense amplifiers, each of said sense amplifiers having an input and an output, the input of one of said sense amplifiers connected to each of said sense lines.

2. The integrating imaging array of claim 1 wherein the input of each of said sense amplifiers is an inverting input and wherein each of said sense amplifiers further includes a capacitor and an exponential feedback element connected between its inverting input and its output.

3. The integrated imaging array of claim 2 wherein each of said sense amplifiers further includes means for selectively shorting its output to its inverting input.

4. The integrated imaging array of claim 1, further including:

means for selecting one of said rows; and

means for adapting said amplifier to a known state when none of said rows are selected.

5. An integrating imaging array disposed on a single piece of semiconductor substrate material of a first conductivity type, including:

a plurality of integrating photosensors disposed in a well of a second conductivity type opposite to said first conductivity type, said plurality of integrating photosensors arranged in a matrix including a plurality of rows and columns, each of said integrating photosensors including a bipolar phototransistor having a base region formed from a region of said first conductivity type disposed in said well, a collector region formed by said well, and an emitter region formed from a region of said second conductivity type disposed in said base region, said well connected to a voltage source, first and second spaced apart regions of said first conductivity type disposed in said well forming a channel therebetween, said first region electrically connected to said emitter region, said second region comprising a sense node, a polysilicon gate disposed above and insulated from said channel, said polysilicon gate comprising an enable node;

a plurality of row lines, a unique one of said row lines associated with a particular row in said array, the enable nodes of all of said integrating photosensors associated with said particular row connected to said unique one of said row lines;

a plurality of sense lines, a unique one of said sense lines associated with a particular column in said array, the sense nodes of all of said integrating photosensors associated with said particular column connected to said unique one of said column lines;

a plurality of sense amplifiers, each of said sense amplifiers having an input and an output, one of said sense amplifiers connected to each of said sense lines.

6. The integrating imaging array of claim 5 wherein the input of each of said sense amplifiers is an inverting input and wherein each of said sense amplifiers further includes a capacitor and an exponential feedback element connected between its inverting input and its output.

7. The integrated imaging array of claim 6 wherein each of said sense amplifiers further includes means for selectively shorting its output to its inverting input.

8. The integrated imaging array of claim 5, further including:

means for selecting one of said rows; and

means for adapting said amplifier to a known state when none of said rows are selected.

9. The integrated imaging array of claim 5, further including;

means for serially selecting each of said rows in order; and

means for serially scanning the outputs of said sense amplifiers when each of said rows has been selected.