Photoelectrical switching circuit with frequency divider circuit

• US 5,099,113 A
• Filed: 05/08/1991
• Issued: 03/24/1992
• Est. Priority Date: 05/11/1990
• Status: Expired due to Term

• Current Assignee: IDEC Izumi Corporation
• Original Assignee: IDEC Izumi Corporation
• Inventors: Kawaguchi, Makoto, Oi, Kunio, Satoi, Takashi
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): Lee, John R.
• Application Number:
  US07/697,894
• Time in Patent Office: 321 Days
• Field of Search: 250/214 B, 250/214 SW, 250/214 R, 250/221, 250/222.1, 250/205, 307/311, 340/555, 340/556
• US Class Current: 250/214.00B
• CPC Class Codes: G08B 13/183 by interruption of a radiation beam or barrier
• CPC Class Codes: G08B 13/187 by interference of a radiation field
• CPC Class Codes: H03K 17/941 using an optical detector H03K17/968 takes precedence

Abstract

A photoelectrical switching circuit, which produces a pulse-modulated light for detecting presence of an object by light interruption or reflection, comprises a frequency divider circuit and a signal output circuit and may comprise a control circuit. The frequency divider circuit includes a counter formed by flip-flops and an operation stop circuit. The counter generates light emission pulse signals with variable period and read pulse signals to pick up light sensing signals and outputting the state of the final stage flip-flop as an operation signal. The operation stop circuit stops the operation of the final stage flip-flop after the operation signal is input. The signal output circuit, which provides output signals after the operation signal is input, includes a shift register for shifting the light sensing signals in step with clock pulses, a set output AND circuit, and a reset output AND circuit. The output AND circuit provides a logical product of a set output of the final stage and a set output of the m-th stage of the shift register to direct set terminals of the m+1-th and subsequent stages of the shift register, the reset output AND circuit performs the same operation with the reset outputs and the reset terminals of the shift register, and then the signal output circuit outputs output signals of the final stage of the shift register. The control circuit makes the period of pulse signals of the frequency divider circuit fixed for a predetermined length of time.

Claims

1. A photoelectrical switching circuit, comprising:

a power supply circuit for supplying power to individual circuits of said photoelectrical switching circuit;

a clock generator circuit for generating reference clock pulses;

a frequency divider circuit for generating pulse-modulated light emission pulse signals and read pulse signals in step with said reference clock pulses;

a light emitting circuit, including a light emitting element, for producing light whose intensity is modulated according to said light emission pulse signals;

a light detecting circuit, including a light detector element, for producing light detector output signals; and

a signal output circuit for making a decision about the presence or absence of an object, and generating an output signal representing the result of the decision according to said light detector output signals and said read pulse signals;

wherein said frequency divider circuit comprises a counter having an arbitrary selected number nd of stages of flip-flops, which increments in step with said clock pulses, and an operation stop circuit, wherein said counter outputs pulses based on the states of said flip-flops of up to an md-th stage, where md<

nd, as pulse signals to said light emitting circuit and said signal output circuit; and

outputs the state of the flip-flop of the nd-th stage as an operation signal to said operation stop circuit and said signal output circuit, wherein said operation stop circuit stops the operation of the flip-flop of the nd-th stage after the operation signal is input, and wherein said signal output circuit starts outputting said output signal after said operation signal is input.

2. A photoelectrical switching circuit, comprising:

a clock generator circuit for generating reference clock pulses;

a frequency divider circuit for generating pulse-modulated light emission pulse signals and read pulse signals in step with said reference clock pulses;

a light emitting circuit, including a light emitting element, for producing light whose intensity is modulated according to said light emission pulse signals;

a light detecting circuit, including a light detecting element, for producing light detector output signals according to light detection; and

a signal output circuit for making a decision about the presence or absence of an object and producing an output signal representing the result of the decision according to light detector output signals and said read pulse signals,

wherein said signal output circuit comprises an arbitrary selected number no of stages of a shift register for accepting said light detector output signals and shifting said light detector output signals in step with said read pulse signals, a set output AND circuit, and a reset output AND circuit, wherein said set output AND circuit provides a logical product of a set output of the no-th stage and a set output of the mo-th stage of said shift register, where mo<

no, into direct set terminals of an mo+1-th stage to the no-th stage of said shift register, wherein said reset output AND circuit provides a logical product of a reset output of the no-th stage and a reset output of the mo-th stage to direct reset terminals of the mo+1-th stage to the no-th stage of said shift register, and wherein said signal output circuit outputs an output signal of the no-th stage of said shift register.

3. A photoelectrical switching circuit according to claim 2, wherein said clock generator comprises a first oscillator for supplying light emission pulse signals to said light emitting circuit, and a second oscillator for supplying read pulse signals to the individual stages of said shift register.

4. A photoelectrical switching circuit, comprising:

a clock generator circuit for generating reference clock pulses;

a frequency divider circuit for generating pulse-modulated light emission pulse signals and read pulse signals in step with said reference clock pulses;

a light emitting circuit, including a light emitting element, for producing light whose intensity is modulated according to said light emission pulse signals;

a light detecting circuit, including a light detecting element, for generating light detector output signals according to light detection;

a signal output circuit for making a decision about the presence or absence of an object and outputting an output signal representing the result of the decision according to said light detector output signal and said read pulse signal; and

a control circuit for controlling the operation of said frequency divider circuit according to the relation between the output of said light detecting circuit and said signal output circuit,

wherein said frequency divider circuit conducts frequency division of said reference clock pulses, and generates light emission pulse signals with a varing period, and generates read pulse signals synchronized with said light emission pulse signals, wherein said signal output circuit reads said light detector output signals in step with said read pulse signals, and generates a detection signal when a predetermined number of successive light detector output signals representing the presence of the object are read, and wherein said control circuit makes the periods of light emission pulse signals and read pulse signals of said frequency divider circuit fixed for a predetermined length of time when the number of successive light detector output signals read by said signal output circuit reaches a predetermined number which is smaller than said predetermined number for representing the presence of the object.

5. A photoelectrical switching circuit according to claim 4, wherein frequency divider circuit conducts frequency division of said reference clock pulses, generates pulses of long and short periods alternately and generates read pulse signals synchronized with said pulses of long and short periods.

6. A photoelectrical switching circuit, comprising:

a power supply circuit for supplying power to individual circuits of said photoelectrical switching circuit;

a clock generator circuit for generating reference clock pulses;

a frequency divider circuit for generating pulse-modulated light emission pulse signals and read pulse signals in step with said reference clock pulses;

a light emitting circuit, including a light emitting element, for producing light whose intensity is modulated according to said light emission pulse signals;

a light detecting circuit, including a light detector element, for generating light detector output signals according to light detection;

a signal output circuit for making a decision about the presence or absence of an object and generating an output signal representing the result of the decision according to said light detector output signals and said read pulse signals; and

a control circuit for controlling the operation of said frequency divider circuit according to relation between the output of said light detecting circuit and the result of decision by said signal output circuit;

wherein said frequency divider circuit comprises a counter having an arbitrary number nd of stages of flip-flops, and an operation stop circuit, wherein said counter generates light emission pulse signals whose period is varied by using frequency divided pulses of said reference clock pulses, and generates read pulse signals synchronized with said light emission pulses, outputs said light emission pulse signals and said read pulse signals to said light emitting circuit and said signal output circuit, and outputs the state of the flip-flop of the nd-th stage as an operation signal to said operation stop circuit and said signal output circuit, wherein said operation stop circuit stops the operation of the flip-flop of the nd-th stage after said operation signal is input, wherein said signal output circuit starts outputting said output signals after said operation signal is input, said signal output circuit comprising an arbitrary selected number no of stages of a shift register for accepting said light detector output signals and shifting said light detector output signals in step with said clock pulses, a set output AND circuit, and a reset output AND circuit, wherein said set output AND circuit inputs a logical product of a set output of the no-th stage of the shift register and a set output of an mo-th stage of the shift register, where mo<

no, into direct set terminals of an mo+1-th stage to the no-th stage of the shift register, wherein said reset output AND circuit inputs a logical product of a reset output of the no-th stage of the shift register and a reset output of the mo-th stage of the shift register into direct reset terminals of from the mo+1-th stage to the no-th stage of the shift register, and outputs an output signal of the no-th stage of said shift register, and wherein said control circuit makes the period of pulse signals of said frequency divider circuit fixed for a predetermined length of time when the number of said light detector output signals read successively by said signal output circuit reaches a predetermined number.