Modifiable IC board

• US 5,101,149 A
• Filed: 07/18/1989
• Issued: 03/31/1992
• Est. Priority Date: 07/18/1989
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Aleshi, Rassoul R., Adams, Leon K.
• Primary Examiner(s): Wieder, Kenneth A.
• Assistant Examiner(s): Nguyen, Vinh P.
• Application Number:
  US07/381,565
• Time in Patent Office: 987 Days
• Field of Search: 324/158 F, 324/178 P, 324/73 PC, 324/73 AT, 324/158 R, 324/73.1, 324/500, 324/537, 324/538, 361/414, 361/309
• US Class Current: 324/73.1
• CPC Class Codes: G01R 1/04 Housings; Supporting members; Arrangements of terminals

Abstract

A multilayer IC board is provided with channel plates on its surface for electrically coupling selected drivers and receivers of the ATE to selected electrical contacts of an IC being tested. This is accomplished by first electrically coupling some channel plates to the ATE drivers and receivers and other channel plates to the IC electrical contacts. Selected channel plates are then selectively electrically coupled together thereby coupling selected ATE drivers and receivers to selected IC electrical contacts. This provides for a large number of ATE to IC communication channel combinations that can be easily modified. A multilayer IC board is also provided with a lattice of noise reduction plates on its surface for reducing noise on the power channels to the IC being tested. This is accomplished by first electrically coupling the noise reduction plates to the power channels such that adjacent noise reduction plates are electrically coupled to power channels with different voltage levels. Capacitors are then electrically coupled between adjacent noise reduction plates of the lattice thereby reducing noise on selected power channels. The lattice arrangement of the noise reduction plates allows easy modification of the location of capacitors, especially when the power channels may be modified by the use of the channel plates.

Claims

1. An IC board for providing electrical coupling in a plurality of channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the IC board comprising:

a) first means for providing electrical communication from selected power and I/O drivers and receivers to selected first channels;

b) second means for providing electrical communication from selected power and I/O electrical contacts to selected second channels, said second means comprising;

1) first channel plates located on a surface of the IC board;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the IC board; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels; and

c) third means for selectively providing electrical communication from selected first channels to selected second channels, thereby providing electrical communication from selected test equipment power and I/O drivers and receivers to selected integrated circuit power and I/O electrical contacts.

2. The IC board of claim 1 whenever the first and third means each comprise a plurality of vias.

3. The IC board of claim 1 wherein the second means further comprises a fourth means for providing electrical communication from selected first channel plates to selected second channel plates.

4. The IC board of claim 3 wherein the fourth means comprisers braided coaxial cable.

5. An IC board for providing electrical coupling in a plurality of power and I/O channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the IC board comprising:

a) first means for providing electrical communication from test equipment power and I/O drivers and receivers to selected power and I/O channels;

b) second means for providing electrical communication from integrated circuit power and I/O electrical contacts to selected power and I/O channels, said second means comprising;

1) first channel plates located on a surface of the IC board;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the IC board; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels; and

(c) noise reduction plates located on the surface of the IC board;

d) third means for providing electrical communication from the noise reduction plates to selected power channels.

6. The IC board of claim 5 wherein the first, second, and third means each comprise a plurality of vias.

7. The IC board of claim 5 wherein the noise reduction plates are located in the center of the IC board.

8. The IC board of claim 5 further comprising capacitors placed between selected noise reduction plates for reducing noise on selected power channels.

9. The IC board of claim 8 wherein the capacitors are leadless capacitors.

10. A DUT board for providing electrical coupling in a plurality of channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the DUT board comprising:

a) first means for providing electrical communication from selected power and I/O drivers and receivers to selected first channels;

b) second means for providing electrical communication from selected power and I/O electrical contacts to selected second channel, said second means comprising;

1) first channel plates located on the surface of the DUT board;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the DUT board; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels; and

c) third means for selectively providing electrical communication from selected first channel to selected second channels, thereby providing electrical communication from selected test equipment power and I/O drivers and receivers to selected integrated circuit power and I/O electrical contacts.

11. The DUT board of claim 10 wherein the first and third means each comprise a plurality of vias.

12. The DUT board of claim 10 wherein the second means further comprises a fourth means for providing electrical communication from selected first channel plates to selected second channel plates.

13. The DUT board of claim 12 wherein the fourth means comprises braided coaxial cable.

14. An DUT board for providing electrical coupling in a plurality of power and I/O channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the DUT board comprising:

a) first means for providing electrical communication from test equipment power and I/O drivers and receivers to selected power and I/O channels;

b) second means for providing electrical communication from integrated circuit power and I/O electrical contacts to selected power and I/O channels, said second means comprising;

1) first channel plates located on a surface of the IC board;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the IC board; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels.

c) noise reduction plates located on the surface of the DUT board; and

d) third means for providing electrical communication from the noise reduction plates to selected power channels.

15. The DUT board of claim 14 wherein the first, second, and third means each comprises a plurality of vias.

16. The DUT board of claim 14 wherein the noise reduction plates are located in the center of the DUT board.

17. The DUT board of claim 14 further comprising capacitors placed between selected noise reduction plates for reducing noise on selected power channels.

18. The DUT board of claim 17 wherein the capacitors are leadless capacitors.

19. A probe card for providing electrical coupling in a plurality of channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the probe card comprising:

a) first means for providing electrical communication from selected power and I/O drivers and receivers to selected first channels;

b) second means for providing electrical communication from selected power and I/O electrical contacts to selected second channels, said second means comprises;

1) first channel plates located on a surface of the probe card;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the probe card; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels; and

c) third means for selectively providing electrical communication from selected first channels to selected second channels, thereby providing electrical communication from selected test equipment power and I/O drivers and receivers to selected integrated circuit power and I/O electrical contacts.

20. The probe card of claim 19 wherein the first and third means comprise a plurality of vias.

21. The probe card of claim 19 wherein the second means further comprises a fourth means for providing electrical communication from selected first channel plates to selected second channel plates.

22. The probe card of claim 21 wherein the fourth means comprises braided coaxial cable.

23. A probe card for providing electrical coupling in a plurality of power and I/O channels from test equipment to an integrated circuit, the test equipment having power and I/O drivers and receivers, the integrated circuit having power and I/O electrical contacts, the probe card comprising:

a) first means for providing electrical communication from test equipment power and I/O drivers and receivers to selected power and I/O channels;

b) second means for providing electrical communication from integrated circuit power and I/O electrical contacts to selected power and I/O channels, said second means comprising;

1) first channel plates located on a surface of the probe card;

2) first channel vias located within the first channel plates for providing electrical communication from the first channel plates to selected first channels;

3) second channel plates located on the surface of the probe card; and

4) second channel vias located within the second channel plates for providing electrical communication from the second channel plates to selected second channels;

c) noise reduction plates located on the surface of the probe card;

d) third means for providing electrical communication from the noise reduction plates to selected power channels.

24. The probe card of claim 23 wherein the first, second, and third means are comprised of a plurality of vias.

25. The probe card of claim 23 wherein the noise reduction plates are located in the center of the probe card.

26. The probe card of claim 23 further comprising capacitors placed between selected noise reduction plates for reducing noise on selected power channels.

27. The probe card of claim 26 wherein the capacitors are leadless capacitors.