Printed circuit board test system and application thereof to testing printed circuit boards forming a digital signal multiplex-demultiplex equipment

• US 5,101,151 A
• Filed: 06/27/1990
• Issued: 03/31/1992
• Est. Priority Date: 06/27/1989
• Status: Expired due to Fees

• Current Assignee: Societe Anonyme DBA
• Original Assignee: Alcatel-Lucent France, SA (Nokia Corporation)
• Inventors: Beaufils, Jean-Marie, Marot, Jean-Loup
• Primary Examiner(s): Wieder, Kenneth A.
• Assistant Examiner(s): Nguyen, Vinh P.
• Application Number:
  US07/544,722
• Time in Patent Office: 643 Days
• Field of Search: 324/158 R, 324/73.1, 324/158 F, 324/158 P, 371/15.1, 371/16.1, 371/22.1, 371/22.3, 371/22.6
• US Class Current: 324/750.3
• CPC Class Codes: G01R 31/2815 Functional tests, e.g. boundary scans, using the normal I/O contacts contacting devices G01R31/2808; testing digital circuits G01R31/317, G06F11/00
• CPC Class Codes: G06F 11/2273 Test methods
• CPC Class Codes: G06F 11/273 Tester hardware, i.e. output processing circuits G06F11/263 takes precedence

Abstract

A printed circuit board test system includes a test printed circuit board adapted to be connected to a printed circuit board to be tested. At least one of these two boards is equipped with circuits for selecting the types of signal processed by the board to be tested, adapted to place at least one subsystem of the latter either in a test configuration or in a normal configuration. The test board is provided with configuration control ports and equipped with circuits for connecting these ports to the selector circuits.

Claims

1. A printed circuit board test system comprising a first printed circuit board adapted to be connected to a second printed circuit board, the second printed circuit board comprising a board to be tested, wherein at least one of the first and second boards is equipped with selector circuits for selecting the types of signal processed by the second board, adapted to place at least one subsystem of the second board either in a test configuration or in a normal configuration, and wherein the first board is provided with configuration control ports and equipped with connection means for connecting these ports to said selector circuits.

2. A system according to claim 1, wherein the second board and the first board can be interconnected by two respective complementary multipin half-connectors.

3. A system according to claim 1, wherein the second board is disposed in subrack, the first board is mounted in an extension subrack before being connected to the second board, and the subrack and the extension subrack are assembled together.

4. A printed circuit board test system comprising a first test printed circuit board adapted to be connected to a second printed circuit board, the second printed circuit board comprising a board to be tested, wherein at least one of the first and second boards is equipped with mode selector circuits for selecting the types of signal processed by the second board, adapted to place at least one subsystem of the second board either in a test configuration or a normal configuration, and wherein the first board is provided with configuration control ports and equipped with connection means for connecting these ports to said mode selector circuits, wherein the board to be tested forms a digital signal multiplex-demultiplex equipment wherein said mode selector circuits for selecting the signal types processed by the second board are adapted to place a multiplexer or a demultiplexer of the digital signal multiplex-demultiplex equipment in the test configuration or in the normal configuration, and in that at least one of the first and second boards comprises test signal selector circuits for applying to the second board in the test configuration of the multiplexer and/or the demultiplexer either an external test signal or a loopback test signal obtained from the demultiplexer for testing the multiplexer or from the multiplexer for testing the demultiplexer.

5. A test system according to claim 4, wherein at least one of the first and second boards comprises bit rate selector circuits for selecting different bit rates of external test signals applied to the second board or different bit rates of signals to be observed at the output of the latter.

6. A system for testing a printed circuit board, the printed circuit board has a input portion and an output portion, said system comprising:

control signal input means for receiving control signals,

operation mode selection means for selecting one of a test mode and a normal mode for said system in accordance with at least one of the control signals,

external signal input means for receiving external signals for testing the printed circuit board; and

test mode selection means for selecting, during the test mode, one of a loopback test mode and an external test mode in accordance with at least one of the control signals, wherein the output from the output portion is looped back to the input portion when said test mode selection means selects the loopback test mode, and the input to the input portion is provided by said external signal input means when said test mode selection means selects the external test mode.

7. A system according to claim 6, wherein the external signals have different bit rates for testing the printed circuit board at different bit rates.

8. A system according to claim 7, wherein the printed circuit board to be tested is a multiplex-demultiplex circuit.

9. A system according to claim 6, wherein said control signal input means, said external signal input means and said test mode selection means resides on a test board, the test board is operatively connected to the printed circuit board to be tested.

10. A system according to claim 6, wherein only said operation mode selection means resides on the printed circuit board to be tested.

11. A system according to claim 6, wherein said system further comprises self-tested selection means for selecting a self-test mode for a test board, the rest board operatively connects to the printed circuit board to be tested.