Integratable phase-locked loop
First Claim
1. A totally integratable phase locked loop (IPLL) comprisingsampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal to provide a second reference signal,voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, andcalibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to set gain or bias for determining output/input characteristic of the oscillator means.
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Abstract
An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal (Ref In) to provide a second reference signal (Control Volts Out), and voltage or current controlled oscillator (VCO) means adapted to receive said second reference signal, the second signal serving to regulate the frequency of oscillation of the oscillator, the oscillator providing as an output a digital signal which is fed back to the filter means to provide a clock signal (CLK) for said sampling.
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Citations
12 Claims
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1. A totally integratable phase locked loop (IPLL) comprising
sampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal to provide a second reference signal, voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, and calibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to set gain or bias for determining output/input characteristic of the oscillator means.
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2. An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means including a switched capacitor filter (SCF), the filter means sampling the first reference signal to provide a second reference signal,
voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, and calibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to set gain or bias for determining output/input characteristic of the oscillator means.
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8. An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal to provide a second reference signal,
voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, and calibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to set gain or bias for determining output/input characteristic of the oscillator means, wherein the calibrator means includes at least one digital to analogue converter and further wherein the characteristic of the VCO is determined over the range operating frequencies of the IPLL.
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11. An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means sampling the first reference signal to provide a second reference signal,
voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, and calibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to set gain or bias for determining output/input characteristic of the oscillator means, wherein capacitor/switch pairs are provided in association with the VCO in order to influence the characteristic of the VCO.
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12. An integratable phase locked loop (IPLL) comprising sampled data filter means adapted to receive a first reference signal, the filter means including a switched capacitor filter (SCF), the filter means sampling the first reference signal to provide a second reference signal,
voltage or current controlled oscillator means (VCO) adapted to receive said second reference signal, the second signal serving to regulate the oscillation frequency of the oscillator means, the oscillator means providing an output digital signal which is fed back to the filter means to provide a clock signal for said sampling, and calibrator means inter-coupling the filter means and the oscillator means, the calibrator means serving to variably set slope and gain or bias for determining output/input characteristic of the oscillator means.
Specification