Microprocessor which automatically rearranges the data order of the transferred data based on predetermined order

• US 5,107,415 A
• Filed: 03/31/1989
• Issued: 04/21/1992
• Est. Priority Date: 10/24/1988
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Sato, Koichi, Kittaka, Yoshiaki
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): Lim, Krisna
• Application Number:
  US07/331,481
• Time in Patent Office: 1,117 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 712/300
• CPC Class Codes: G06F 7/768 Data position reversal, e.g. bit reversal, byte swapping

Abstract

A microprocessor which exchanges data of a plurality of bits arranged in a predetermined order by every predetermined number of bits comprises, an area assignment register for assigning a certain area in an address space, a holding register for holding order information of data in the assigned area, and a circuit for rearranging the data bits order in response to the order information when data are exchanged with the assigned area, and processes the data to increase the execution speed by rearranging the data order automatically by hardwares in response to the order information of data in the area, when respective microprocessors in a multiprocessor system share a certain area of a main memory.

Claims

1. A microprocessor, which exchanges with external elements data of a plurality of bits arranged in a predetermined order, comprising:

area assignment means for preassigning an area in an address space of a memory;

order information holding means for holding order information of data transferred from an external element and stored in the area preassigned by said area assignment means, the order information indicating whether the transferred data are arranged in the predetermined order;

data source determination means, responsive to the output of said area assignment means, for determining whether data stored in the memory and accessed by the microprocessor are from the preassigned area; and

order rearrangement means, responsive to the output of said order information holding means and the output of said data source determination means, for automatically rearranging the data order of the accessed data if the accessed data are not arranged in the predetermined order when said data source determination means determines that the accessed data are from the preassigned area.

2. A microprocessor as set forth in claim 1, wherein said order rearrangement means includes a bus interface portion for interfacing exchange of data with the external elements.

3. A microprocessor as set forth in claim 1, further comprising, area setting means for setting the size of the area preassigned by said area assignment means.

4. A microprocessor as et forth in claim 1, further comprising, rearrangement control means for adjusting said order rearrangement means in response to the number of said accessed data bits so that only said number of bit lines of said order rearrangement means are selected for rearrangement operation.

5. A microprocessor as set forth in claim 1, wherein said predetermined order is of a big endian system.

6. A microprocessor as set forth in claim 1, wherein said predetermined order is of a little endian system.

7. A multiprocessor system having a plurality of microprocessors, each of which exchanges with internal and external elements data of a plurality of bits arranged in a predetermined order, comprising:

a memory; and

a plurality of microprocessors, each of which comprises;

area assignment means for preassigning an area in an address space of said memory,

order information holding means for holding order information of data transferred from one of the elements and stored in the area preassigned by said area assignment means, the order information indicating whether the transferred data are arranged in the predetermined order,

data source determination means, responsive to the output of said area assignment means, for determining whether data stored in said memory and accessed by the microprocessor are from the preassigned area, and

order rearrangement means, responsive to the output of said order information holding means and the output of said data source determination means, for automatically rearranging the data order of the accessed data if the accessed data are not arranged in the predetermined order when said data source determination means determines that the accessed data are from the preassigned area.

8. A microprocessor, which exchanges with external elements data of a plurality of bits arranged in a predetermined order, comprising:

means for preassigning an area in an address space of an external memory;

means for storing order status of data transferred from an external element and stored in the area preassigned by said preassigning means, the order status generated by software in advance and indicating whether the transferred data are arranged in the predetermined order;

means, responsive to the output of said preassigning means, for determining whether data stored in the external memory and accessed by the microprocessor are from the preassigned area; and

means, responsive to the output of said storing means and the output of said determining means, for automatically rearranging the data order of the accessed data if the accessed data are not arranged in the predetermined order when said determining means determines that the accessed data are from the preassigned area.