Pattern associative memory system

• US 5,107,454 A
• Filed: 08/14/1989
• Issued: 04/21/1992
• Est. Priority Date: 08/15/1988
• Status: Expired due to Term

• Current Assignee: Agency of Industrial Science & Technology (Government of Japan)
• Original Assignee: Agency of Industrial Science & Technology (Government of Japan)
• Inventors: Niki, Kazuhisa
• Primary Examiner(s): Smith, Jerry
• Assistant Examiner(s): Lo, Allen M.
• Application Number:
  US07/394,062
• Time in Patent Office: 981 Days
• Field of Search: 364/807, 364/513, 371/30
• US Class Current: 706/25
• CPC Class Codes: G06N 3/044 Recurrent networks, e.g. Hopfield networks
• CPC Class Codes: G06V 30/194 References adjustable by an adaptive method, e.g. learning

Abstract

In a pattern associative memory system, an error correcting circuit is constructed in the form of a neural network. A memory condition of the error correcting circuit is established according to a back propagation method. If a memory pattern is recollected, an output from the error correcting circuit is again inputted to the error correcting circuit for feedback, thereby repeatedly performing error correction calculations of a pattern as the basis of recollection.

Claims

1. A pattern associative memory method for associating and storing patterns comprising the steps of:

inputting a set of pattern signals to be learned to a group of input elements of an error correcting circuit having one group of input elements for inputting information signals, one group of output elements including the same number of elements as the number of said input elements and each having predetermined signal level conversion characteristics and a plurality of wirings arranged in the form of a neural network and for connecting said one group of input elements to said one group of output elements;

storing a pattern shown by the inputted pattern signals in said error correcting circuit while variably setting each transfer efficiency of said plurality of wirings, by using a backpropagation method so that the inputted pattern signals and a set of output signals outputted from said group of output elements have substantially the same level;

inputting at least one set of pattern signals as the basis of a recollection of said group of input elements under a condition having the same transfer efficiency as the set transfer efficiency when the recollection is performed;

feedback-inputting said set of output signals outputted from said group of output elements to said group of input elements; and

outputting a set of the outputted signals in a converged condition as a result of recollection of said set of pattern signals as the basis of the recollection.

2. A pattern associative memory method as claimed in claim 1, further comprising the step of variably setting a bias value of each signal level conversion characteristics of said group output elements simultaneously with said setting of the value of the transfer efficiency.

3. A pattern associative memory system comprising:

means for correcting errors, said means having a group of input elements for inputting a set of pattern signals as the basis of recollection, a group of output elements having the same number of elements as the number of said group of the input elements and each having predetermined signal level conversion characteristics and a plurality of wirings arranged in the form of a neural network and for connecting said group of input elements to said group of output elements wherein at least one set of pattern signals used as the results of recollection is stored in advance in accordance with a value of transfer efficiency of said plurality of wirings and a level of said at least one set of pattern signals as the basis of the recollection is made close to a level of a pattern signal which is most similar among said at least one set of pattern signals; and

feedback signal lines for feedback-inputting said set of output signals outputted from said group of the output elements in said means for correcting errors to said group of input elements.

4. A pattern associative memory system as claimed in claim 3, wherein said means for correcting errors further includes at least one group of hidden elements which have predetermined signal level conversion characteristics and which are disposed between said group of input elements and said group of output elements;

and said group of input elements, said group of output elements, and said hidden elements are connected to each other in the form of a neural network.

5. A pattern associative memory system as claimed in claim 3, further comprising an instructing means for selectively instructing either a learning and memory mode or a recollection mode;

and

a signal line switching means for inputting a set of pattern signals to be learned to said group of input elements and interrupting the connection between said feedback signal lines and said group of input elements when said learning and memory mode is instructed by said instructing means, and for inputting said set of pattern signals as the basis of recollection to said group of input elements to connect said feedback signal lines to said group of input elements when said recollection mode is instructed by said instructing means.

6. A pattern associative memory system as claimed in claim 5, further comprising a memory condition establishing means for establishing a value of said transfer efficiency of said plurality of wirings as a memory condition in said learning mode, so that a level of said set pattern of signals as the basis of recollection which is inputted to said group of input elements and a level of said set of pattern signals outputted from said group of output elements are substantially identical with one another.

7. A pattern associative memory system as claimed in claim 6, wherein said memory condition establishing means establishes a correction value of said transfer efficiency in accordance with the backpropagation method.

8. A pattern associative memory system as claimed in claim 3, further comprising means for judging whether a level of said set of output signals outputted from said group of output elements of said means for correcting errors is changed or not;

and

a display means for displaying a message that a recollection process is completed when said judging means outputs a negative judgment.